ABOUT INVERTERLOGIC
I introduce here an "inverterlogic", which allows to base mathematic as well
as geometry on a single axiom.
This axiom is an abstracted transistor and therefore there is not to dispute,
that it is a matter of fact. It can be imagined as an abstracted seasaw too and
is therefore much more simple than a pair of compasses and a ruler or as an
abacus.
My idea might be more acceptable, if I start stating, that I did not intend to
make a new base for mathematics, but wanted to solve the problem to solder
standardized electronical "logic devices" in such a way, that I could reach my
aims. Normally Boole's algebra is used for this purpose. But as that algebra
seemed to me to be too complicated and in some respect even not useful, I aimed
to a less complicated consideration enabling me to consider the needed timing
too. As in fact those electronical devices are made only out of transistors in
source circuits, it was next to me to consider those transistor circuits, which
are familiar to me and could be easily soldered by me for experimental purpose
too. This was upon a time of about 15 years ago the first step to the idea,
which I discuss below.
For the first I was happy to be able to solve my problems really fast and
perfect.
More than one year passed by till I realized, that Boole's operators
(sometimes called "junctors" too) AND and NOT, which are demonstrated by
deMorgan's theorem to be fundamental, are not as fundamental as that peculiar
NOT, which is an inverter logically considered. But new expressions then were
needed, which I evaluated in the meantime. These expressions are in general the
same as used to design electronical circuits.
The NOT, given by an inverter, is not only more fundamental but a matter of
fact opposite to Boole's operators, which are in principle not more than the
syllogisms of Aristoteles, created more than 2000 years ago. Till Boole the
relation to the usage of language did not disappear, a relation, which of
course instantly provokes the idea, that logic is not a matter of fact, but
exists only in our minds. Spinoza as well as Kant tried to dispute these ideas
needing a lot of words, which critically considered did not proove evidence but
look more like an incantation. Also in modern "mathematical logic" after Boole
the relation to usage of language is only disguised and not antiquated, not
leading to evidence but only new signs and formulas, which can not be used
without taking a strenuous run. That is why matters can still be seen opposite
to spirit, world spirit or any other holy spirit.
But in respect to an inverter there is only to state, that it is oscillating,
if the exit is connected to the entry, and the evidence is prooved, that logic
is a part of and in this world. If connected inverters are real, i.e. as a
transistor circuit, the represented logic is independant of a human observer
always the same and real as well. Thus logic is not an idea or reasoned by any
usage of language.
But you will have to consider truth in a very different way, because the commom
way in fact prevented of relating logic to reality. Although the intention to
use logic to distinguish true from false is formalized now to "values" "true"
and "false", logic was not made real by this and besides did not keep truth in
certain expressions out of doubt.
Truth in inverterlogic is a physical effect instead, which can be considered
anyway as other matters of fact, which can not be touched as electrons or black
holes...
Nevertheless the dream of logical verification depending on sentences is not
antiquated, but on the contrary is related to reality and is physical existant.
I demonstrate under 2.1.3.1. how inverterlogic enables automatically done
verification of algebraic equations using dull computers.
Of course there is to say some more to demonstrate, that the whole logic can be
made out of inverters.
The reader of this can trust in the evidence of this idea, because there were
nothing to read, if not at least the solderable inverters were logical enough.
But that an inverter, abstracted as inverter-axiom, can oscillate too, you can
read for the first time here...
I demonstrate with an abstracted monoflop under 2.2.1., that the logic and
therefore the whole mathematic includes at least a dimension of time and is
therefore a part of reality. The dimension of energy has to be there too,
because nothing in this world can effect anything, if it is not at least a
Planck's quantum (existing in dimensions of time and energy).
This is ignored by abstraction in common mathematic, which else is scarcely
changed.
In a very different way, but so to speak by short-cut too, the dimension of
time appears too considering a register under 2.2.2. Then not times between
argument and result as short as may please are to notice, but times as long as
may please, which appear evidently as a state of storage in computers
too.
These statements considering a logic, extended with a dimension of time, are
not a joke, but allow far reaching conclusions especially in physic, which
seems to make facts not intelligible without mathematic, but presents only
phenomenas and effects.
Some readers, familiar with the formula from Einstein "E is equal to M
multiplied by the power of 2 of c", basing the idea of an universe, which
appeared out of nothing with a big bang, may be not familiar with the fact,
that he thought very little such formulas to be useful to express physical
facts perfectly enough. Other immortal physicians had a lot of trouble too
to use mathematical methods making clear and calculatable, what they could find
in experiments. Especially Bohr, Heisenberg, Schrödinger, Dirac and others
needed to think of a particle-wave duality and probability, not only irritating
Einstein, but also elsewhere provocing exasperated philosophical discussions
about to be or not to be. But there was no chance to prevent of this because of
experimental stated facts.
Considering this in respect to inverterlogic makes you see, that not a lack of
judgement or loyalty to philosophical maximes caused the irritating duality,
but a lack of fitting mathematical expressions. Inverterlogic annihilates that
to and from, because the inverter contains such a "duality" in one singular
thing, caused by taking time between argument and result. I base geometry under
2.2.1.1. with the side-effect too, which shurely will enjoy some physicians:
Not only time appears quantized, but space too, which becomes a dimension
related to time, while Einstein was only able to combine time insoluble with
space, stating a space-time.
Thus the inverterlogic is the mathematical way to prevent of the contradiction
between theories of relativity and quantum, which is in principle caused by a
not quantized geometry, which Einstein had to use to express the curvature of
space due to matter. There is to say, that mathematicians can imagine one more
point between every two points...
String-theory, based on the inverter, which is capable of oscillating, will
become new and real, while dimensions need not be arbitrarily supposed. The
possible dimensions are considered under 2.2.1.2.1. All dimensions are derived
from one, which is to divide to get more than one. This text is visible in two
dimensions for a reader, because the picture is just made by this way...
The logic, based on the inverter-axiom, is not suited for haunting between
points and especially between numbers. In the inverterlogic both elements in
mathematical theory are based on the inverter, but not only one. Then one thing
becomes elementary, which is familiar neither to mathematicians nor to
physicians - the adress. By the way there is demonstrated, what about truth in
the logic.
The adress, coherent to inverterlogic, is not seen as an adress, familiar to
programmers, but as a circuit, familiar to engineers. They know that circuit as
a "wired OR". In the inverterlogic this circuit is changed to connected exits
causing the unsoluble statement, that there exist two kinds of inverters, which
nevertheless are effecting the same values and thus are given by the same
inverter-axiom. This is also much more of interest in physical consideration
than logical relevant, because the matter-antimatter duality thus can be
reasoned logical, while till now it is only stated. This analogy supports the
idea too, that there are in fact inverters and their connexions in the nature.
But there is to say, that there seems to be no chance to identify the inverter
as any known particle. I speculate, that it is equal to Planck's time ( or
length) - extremely tiny.
Besides that, engineers are used to solder outputs of transistors to make them
acting like Boole's OR. But they can make adresses too by this way, which are a
thing, Boole did not consider about hundred years ago. The adress does appear
neither in his logic nor in modern mathematical logic, where only a caricature
is to find as order of quantities and a way to count.
In the inverterlogic you can connect as much exits as you want, but this will
be an "edge", which becomes an adress only under certain circumstances to
consider next. I make that notion "edge", because already facing this banal
connexion you are able to see more than means for adressing or ORing.
Especially the knowledge of the state at the inputs disappears in case of a
certain result, which then can be interpreted as ORing. Thus OR is not an
operator as seen by Boole or Aritoteles, but a state, caused by certain values
and connexions in the eyes of an observer, who can not see behind the
connexions, if he does not see more than values of results. An "edge" is in
fact a horizone of event, hiding every lots of places and values there and by
that every sense. But the value at the edge exists and can get any meaning a
posteriori(!), if the value is not the result of ORing. If you prevent of
assigning a meaning to ORed values, you prevent of the known fuzzyness caused
by algebraic negation. Then making truth evident is possible.
This allows more far reaching conclusions too, because an existing physical
logic only allows many meanings but excludes every sense in this world, while
the meaning is not caused by any creator or most important programmer, but made
by that thing, which gets the result at an edge as an input. This supports the
evidence of the theory of evolution, which does not plaid for creatures made
out of loam and breath of an creator, but a fitting meaning due to changed
circumstances. Making the meaning is done in a region, which nearly everyone
accepts as code, the DNA.
Much more imposing is to think of ORing existing everywhere in the nature. This
ORing as derived in the inverterlogic is even not familiar to mathematicians,
but well suited to handle probability in such a mathematical way, which does
not look like incantation of ghosts.
But mathematicians will mainly wonder about operators, which are not boxed
elsewhere than numbers. They are familiar instead with making heaps out of
numbers or elements and operators, but need great efforts making this evident
in one case or to distinguish it in other cases.
Mathematicians know the "incompleteness sentences" of Gödel too, which prevent
them to dream of a theory, which bases the whole mathematic on some or even one
Axiom. As about hundred years ago Hilbert had such a dream, his student Gödel
made the proof, that this is not possible using the natural numbers given by
the axioms of Peano and then valid operators (Peano-arithmetic"="PA"). Because
of this the incompleteness sentences depend on everything based on PA too. In
every case there are to find antinomy and not-calculability.
This depends not on the inverter-logic, because it is not based on natural
numbers. Also the means, used by Gödel in his proof, especially the operators,
are in the inverterlogic derived from the inverter-axiom and nothing else and
because of that are quite different, if there is not common calculating of
interest, but i.e. "calculability". These operators can not be represented by
numbers or used as numbers in any case - which is the starting point of Gödels
proof and named "Gödelizing".
In short: The very elegant proof, made by Gödel, says, that PA and on this
based other things are incomplete, while the inverterlogic says, where it is
incomplete (i.e. the dimension of time and the consequences of oscillation and
and storage) - but of course, there is to say some more depending on this...
Besides logical connexions, which touch known things, I introduce under 3. a
new kind of logical connexions, which enable you to cause those few possible
connexions of single inverters using a code and to get by this way
every logical machine you could like as a set of values.
Nevertheless this representation is not done by Gödelizing and is obviously not
made out of numbers, but a code, which is to use due to peculiar rules and is
insignificant without an 'efficacy-giver'. Only by this way, you can finally
get 'artificial intelligence' (="AI").
My idea of an 'efficacy-giving' demontrates at the one hand side, that every
tried way towards artificial intelligence is completely missing the mark. It
will never be available neither using known computer structures nor "higher"
languages. It will also not be available using any circuits, which are
suggested to imitate human information computing (i.e.'neuronal networks'). By
this way only a (much too complicated) programed adaption is available, but not
learning and thinking. At the other hand side, my idea demonstrates, that
artificial intelligence is not as desireable, as you like to think. Some people
achieve to get pleasant tin-niggers without a will. But in fact thinking is not
possible without a free will (some people know this already), and chiefly not
without a feeling. This feeling in machines can never be aequivalent to the
known common one. And if it could be aequivalent to known feeling, it would be
not less to avoid. Such machines indeed can be much more incalculateble dull,
bad, maniacal and old. They must never leave the laboratory!
I intentionally evaluated the here presented inverterlogic complete deductively
and interpreting. A discussion of such problems is therefore not included. But
I added some discussion at places, where the roots of such problems are. An
example are sets of elements, which include themselves as an element -
discussed under 2.1.3.
In inverterlogic numbers are available only as the significance of the values
of inverters. Operators are made as well as numbers by connecting inverters and
are available in the same variety at pleasure as number systems. Numbers are
derived under 1.2.2. considering elementary connexions, while operators are
derived not before making clear, what numbers are. Thus I prevent of something,
which irritates at least me facing the known axioms.
The axioms of Peano define indeed the quantity of natural numbers, but stating,
that they are already out there and thus there are to define only rules to find
the "next" one in that heap. This can only be done, if a addition of a 1 is
already available too.
The definition starting at prime numbers additionally needs the division
available, which can only be done, if subtraction and therefore negative
numbers are already given. The natural numbers need to be given before they are
to define, else there could not exist any prime number.
In inverterlogic instead the numbers are derived from the possibilities to make
the values of inverters appear by connecting them in a certain way, while a
single inverter can only result values H or L and thus can only define one
place amongst lots of needed places for numbers.
At the one hand side inverterlogic makes immense amounts of number systems and
operators manifest, but on the other hand side antiquates some common ideas,
which are in fact superfluous or even troublesome - especially, if calculations
have to be done by computers. While till now computers are supposed to exist in
quite an other world than numbers and operators, inverterlogic enables you to
derive the computer only from the inverter-axiom, making a formula out of the
computer as well as out of that, which is known as program, but not meant in
the way, inverterlogic makes it appear. There it appears namely as a manner of
adressing and not as means to make money.
You might not be pleased by the effect, that digital circuits as well as
programcode can be no longer granted for patent ( at least in respect to german
patent law). But besides more insight you will get instead rules for shortening
without fee, which make devices and code much simpler and better. Finally the
construction of digital circuits is simplified (which was my starting
point).
Now I gave a sketch of the significance of the following text. The details you
will have to explore there.
At an additional page, I publish consequences of the inverterlogic, which here
are only sketched, but thoroughly discussed there:
notes about inverterlogic
Depending on copyright there is finally to say:
This text is the property of me, Rainer Cornelius Friz.
All rights for publishing, storing on any media (paper too!) and translation
are reserved. The GPL does not apply!
But of course I am interested in publishing and translations. Thus only my
explicite permission is to request. Every Reader can link to this page at
pleasure and make a copy on a medium at pleasure. But he is prohibited to make
money with this text, change the text or make it even to his (her) own.
I wish too, that you do not quote this text without a link to www.rcfriz.de
and tell me, if You publish advanced consideration, so that I can publish a
link to it.
As english is not my mothertongue, I beg for pardon for any misunderstanding.
Please help me, if You speak a better english as mothertongue.
Date of first (german) publication:1.6.2009
Date of first (german) publication of chapter 3.:20.6.2010
You can find my email-adress in my sources of ASMOS (safe against spamers).
Here I tell it only encrypted: My mailbox is "asmos", separated by the at-sign
from the domain-adress "rcfriz.de".
Please do not use HTML-format, because I delete such mail.
Homepage www.rcfriz.de
INVERTERLOGIC
INTRODUCTION:
In the inverterlogic every logic is derived from a single axiom.
I will use expressions in this treatise, which prevent of misunderstanding by
using for every important word an explained thing for thinking of. Besides
that I will use different words to distinguish the behaviour of inverterlogic
and the arbitrary interpreting and naming things by an observer.
For the first I will explain the use of some words, which I use to order the
text.
EXPRESSION...
is any sequence of any signs, which I want to use for a thing of thinking,
which I explained before using more and other signs. This shortage of signs
shall be unmistakeable while further use.
If I want to discuss an expression, I will use the signs '...' as brackets.
NOTION...
is an expression, which is more evaluated in respect to some more expressions
and relations between the expressions. I will use this word similar to the word
'definition', but not intending to distinguish things from others, which till
might be to explain. I intend to make sense playing with the usage of language,
ways of thinking and sensual experiance of those I want to make understand.
ERGO...
marks a conclusion of a preceeding view. But I will only those conclusions mark
in this manner, which lead to expressions, notions or rules.
RULE...
ist not a description of rules of games or ways to do something, given by an
legislator, but is the result of a critical observation of things, which is
expressed by the observer. Thus I use this expression in the sense of the
mathematical use of 'law' or 'lemma'.
EXPLANATION...
is a critical review of preceeding notions and rules. If it makes sense, these
statements will be discussed in respect to other coherent or more familiar
things.
1. INVERTER-AXIOM
The inverter-axiom is:
The inverter has one entry and one exit, which are always in one of two states
H and L .
The state H at the entry takes the effect of the other state L at the exit of
the single inverter.
The state L at the entry takes the effect of the other state H at the exit of
the single inverter.
The states H and L are the values of the inverter.
The efficacy of values is only possible from the entry to the exit, but not in
the reverse direction.
Entries as well as exits can be connected to other entries or exits.
The connection is characterized by only one existing value.
EXPLANATION:
As I needed a lot of words to express the inverter-axiom, you might think, that
this is not an elementary thing. This impression fades, when you see, what in
fact is defined. This is a relation between the two sides of a seasaw, but
including the very important difference, that the two sides are asymetrically
an entry and an exit, both in only one of two possible states.
The euclidic space, where a seasaw exists, becomes two elementary places of a
thing in two states. The two places are the criterion, if the state is causual,
thus omitting the definition of an operator and an equation.
The well known sign '=' between the cause and the caused part of a function
becomes the elementary efficacy, which is not an operator, but the character of
an inverter in the eyes of an observer.
A more corresponding thing is a transistor in a emitter-circuit, which is
better suited than the seasaw to proove every statement made here. From this
electronical analogon I took the name 'inverter'.
Although I frequently will use relations to well known transistor-circuits and
take names out of the space of digital electronics, I intend not only to make
notions depending on those things, but to derive those things and finally
algebra from inverterlogic. Beyond this, I will derive arithmetic and geometry
from only the inverter-axiom.
The most important first step in this direction is the abstraction, given by
the inverter-axiom, and the determination to make more than new names for well
known things, which will remain the same.
But I will have to alter the contents of many known expressions. Next for
example I will explain, that the known operator 'inversion' respectively the
'inverse element' can't be the same as the efficacy of an inverter.
If you try different views of the inverter-axiom in your mind, You will find,
that used notions and definitions fade in an elementary, apart thing. But else
the inverter-axiom could not be the origin of functions, operations,
dimensions, categories, attributes, criterions and other things of thinking of.
1.1. ELEMENTARY CONNEXIONS
1.1.1. SERIES
The expression 'efficacy' was used already as synonym for the familiar
expression 'transmission function'. But as this familiar expression is already
in certain use, 'efficacy' shall be the notion to describe the transmission of
a single or more connected inverters, which is discontinually done.
Thus 'efficacy' is, what one or more inverters do with values at their entries.
At first there are some more expressions to make for the use in the following
consideration.
EXPRESSION: 'logical'
Connected inverters and their values are logical. I use the expression to make
a difference between things, which I can describe like this, and those, which I
cannot describe like this.
EXPRESSION: 'relation'
Any amount of logical connected inverters are a relation. A relation consists
of any amount of entries and exits.
EXPRESSION: 'inversion'
Every connexion of two places, where one value of the inverter is the efficacy
of the other one, is an inversion. But the connexion cannot be replaced by a
single inverter, if there are other entries or exits connected between entry
and exit of the connexion.
EXPRESSION: 'series'
A relation of inverters, where every exit is connected to only one entry, is a
series.
EXPRESSION: 'even series'
Series of two or multiple of two inverters are even series.
EXPRESSION: 'odd series'
Even series connected to one more inverter are odd series. The efficacy of odd
series is an inversion.
EXPRESSION: 'branching'
A branching exists, if the exit of an inverter is connected to more than one
entry.
EXPRESSION: 'parallel'
Inverters lay on parallels after branching, which are represented in lines
one upon another.
EXPRESSION: 'origin'
The value L connected to the entries of a relation is an origin.
EXPRESSION: 'argument'
The values H or L at entries of a relation are the argument.
EXPRESSION: 'result'
The values H or L at exits of a relation are the result.
EXPRESSION: 'setting'
All values in a relation caused by an argument are the setting, which contains
the result too.
If you imagine a lot of inverters connected to each other, you can instantly
see, that there are more different places, where values occur, than different
values.
As only at these places arguments and results of logical connexions can occur,
further expressions and notions are needed to discuss connected inverters and
settings:
NOTION: 'place'
At one place, there is an entry or an exit and therefore a value too, which
should be considered.
Places are distinguished by any appropriate naming. The choice of places and
the naming are reasoned by consideration.
EXPRESSION: 'probe'
Taking a probe is to transfer the values of inverters to the world and naming
system of the observer - a hypothetical branching.
EXPRESSION: 'depth'
Places marking connected inverters, make the depth of the considered relation.
The measure of the depth is the amount of inverters at that parallel, where the
most inverters are connected.
The depth gets deeper in the direction to the exits and gets lower in the
direction to the entries.
EXPRESSION: 'width'
The amount of parallel connexions, entries or exits are marked as the width of
a relation.
EXPRESSION: 'entry-width'
...is the width at the lowest end of a relation.
EXPRESSION: 'exit-width'
...is the width at the deepest end of a relation.
EXPRESSION: 'field'
A field is built by depth and width.
EXPRESSION: 'line'
A place besides others is expressed as a line in a symbolic representation, but
is nothing else than a place. Lines are needed by an observer for the purpose
of consideration and are not a part of the inverter-axiom.
EXPRESSION: 'column'
Columns exist only in representations as vertical order of signs.
EXPRESSION:
Consideration and evidence of conclusions are made easier here by using the
following signs as expressions:
The inverter with the entry at left hand side is '>'
Connexions are 'o','-' and '|' ('o' marks branching between lines)
The 'X' is used for crossing of lines, which are not connected.
The signs 'H' and 'L', expressing the values of the inverter, are used to mark
a source of the certain value too.
You can see a first rule using these expressions:
A value at the first entry of even series effects the same value at the last
exit.
RULE: 'first shortening-rule'
Even series can be shortened by ignoring them.
By shortening ignored inverters can be obviously connected again. Whereever a
value H or L exists, an even series exists too, but can be ignored.
RULE: 'first extending-rule'
There can be connected any even series between every connexion of entries and
exits.
1.2. EDGES
If the exits of two inverters are connected, there has to be only one value
according to the inverter-axiom, even if there are different values at the two
entries.
ERGO:
...triumphs one value over the other at connected exits of inverters and is not
only effected by the value at an entry.
The inverter-axiom says nothing about triumphing values.
Thus two kinds of inverters exist:
The one effects unconditional L at the exit by a H at the entry, but
conditioned by connected exits a H effected by a L at the entry.
The others act reverse.
Both kinds of inverters cannot be connected with their exits. Else the value
isn't reliable because the connexion does not accord to the inverter-axiom.
Following rule can be seen:
RULE: 'exit-rule'
At connected exits one value triumphs over the other one.
Two kinds of inverters exist, which must not be connected at their exits.
As naming of both kinds can be done at pleasure, I fix for further
consideration:
NOTION-EXTENSION: 'inverter'
At connected exits of inverters a L triumphs over H
NOTION: 'anti-inverter'
At connected exits of anti-inverters a H triumphs over L
EXPRESSION:
The here used sign to express an anti-inverter, exit at left hand side, is: ')'
An expression for connexions at edges has to be fixed too.
EXPRESSION-EXTENSION:
Signs 'O' at right hand side of a '>' in a column mark connected exits at an
edge. There are to distinguish connexions marked using 'o', which express a
branching.
Connexions of anti-inverters built an 'anti-logic', which isn't considered,
because there is nothing important to find. Because of this I liked to split
the notion of inverters in two halfes.
As there are no anti-values, the one kind of logic can output arguments to the
other kind of logic. Only the connexion of exits is prohibited.
You can find an analogue rule in electronical circuits of NPN-transistors
instead of inverters and PNP-transistors instead of anti-inverters.
We now consider the most simple relation of inverters, connected at the exits,
showed with the four possible settings:
L-->O-H L-->O-L H-->O-L H-->O-L
L-->O H-->O L-->O H-->O
Only then, when there are L at all entries, the relation results H.
Any H at any entry effects the result H.
Thus only one argument exists, which is resulted by this relation to H.
This obviously does not change, if any immense number of inverters is connected
at their exits.
NOTION: 'edge','even edge-entry','odd edge-entry'
If at least two exits of inverters are connected, this relation is expressed:
'inverters lay at an edge'
The entries of odd series at an edge are odd edge-entries, while even series
of inverters at an edge are even edge-entries.
Now there can be assigned to the two possible results, what AND and OR is in
the inverterlogic.
NOTION: 'AND','ANDing'
The value H at an edge, which is effected by only one of the possible
arguments, is the result of ANDing and means AND.
NOTION: 'OR','ORing'
The value L at an edge, which is effected by every argument except of one, is
the result of ORing and means OR.
Every edge, where only inverters lay, ANDs the values L at all odd edge-entries
to H, and ORs a single or more values H at any entries to L.
Every edge, where only anti-inverters lay, ANDs the values H at all odd
edge-entries to L, and ORs a single or more values L at any entries to H.
RULE: 'edge-rule'
Every edge ANDs to H ,but ORs to L
This is independant of the kind of entries, which can be even or odd.
An edge, where anti-inverters lay, does the same, if there is one more inverter
or anti-inverter connected to every entry and the exit.
Thus there is no reason to express an 'anti-edge-rule'
The efficacy of the following edges is identical:
L-->O--H L-))O)-H
L-->O L-))O
If you consider any immense number of entries laying at an edge, there is the
question, if such a relation can be altered, so that the behaviour is changed.
Then an extending-rule could be found, which could lead to a complementary
shortening-rule as already demonstrated above.
We can easily find, that only even series result the value at an edge
unchanged and we can see too, that even edge-entries result the values at edges
as if the exits of those edges connected to the even edge-entries where
connected to each other.
Thus we can see, that the edge at the left hand side results the same value as
the other relations:
----->O ----->->---->O ----->O>---->O ----->O
----->O ----->->---->O ----->O>---->O ----->O--->->O
| | | |
----->O ----->->---->O ----->O>---->O ----->O--->->O
----->O ----->->---->O ----->O>---->O ----->O
In this representation the first extension-rule and the first shortening-rule
are used for prooving evidence.
RULE: 'second extending-rule'
At every edge a connexion of exits can be replaced by an edge with even
edge-entries. The result of the connected edges then is effected at that next
edge.
Without efforts, but with far reaching consequences, there is to state too:
RULE: 'second shortening-rule'
Edges with even edge-entries can be shortened by connecting the exits, which
are connected to the entries, to each other at one edge, replacing the edge
with the even edge-entries.
Finally we make the...
NOTION: 'elementary connexions'
Those connexions are elementary, which consist of not more than one edge.
Thus series and edges are elementary.
EXPLANATION:
In this chapter the base of the inverter-logic was evaluated.
The next evaluations are done in two directions:
1. Evaluation and discussion of relations
2. Theory of patterns, numbers, operations and meanings
These directions are distinguished as normally done, but are only one sphere in
the inverterlogic.
The 2nd direction leads to possibilities of settings. I will get to the known
mathematical things by this way.
The 1st direction is derived from edges, which touch a topic known as Boole's
Algebra. Now I explain how edges are related to that known things.
At first I introduce Boole's operators - not as tables, but represented as
relations:
"AND" "OR" "NOT-AND" "NOT-OR" "NOT"
---->>O-- --->O>- ---->>O>- --->O-- -->-
---->>O --->O ---->>O --->O
The naming follows Boole's relation between names and arguments. The value H is
here Boole's value 'true' (i.e. the result of "AND" ist 'true', if the value
at both entries ist 'true').
This naming has nothing to do with the notions AND an OR in the inverterlogic.
DeMorgan's theorem: NOT (A OR B)=(NOT A) AND (NOT B) demonstrates the statement
that Boole's operators AND and NOT are fundamental and the base of all logic.
This theorem is demonstrated in the inverterlogik like that:
If inverters are connected at both entries and the exit of an here "OR" named
relation, the relation becomes an "AND" (using the first shortening rule).
In the inverterlogic only a special "NOT", the efficacy of the inverter is
fundamental.
While the efficacy of an inverter is really fundamental, the inversion is not
fundamental and the algebraic NOT leads to nonsense - look at 2.1.2.
The inverterlogic makes you see, that Boole's NOT-OR (=NOR) with two entries
is the most simple relation. The other operators of Boole can be derived from
it by connecting some more inverters to entries or exits.
While Boole's AND has the roots in human usage of language and is defined as
operator using tables containing vague values 'true' and 'false', the AND in
the inverterlogic is one of two possible values at an edge and is derived by
the way to no contradiction in the second shortening rule as a notion
convenient to human usage of language. There is no operator artificially
designed, but a relation is made and the efficacy is stated and named if
needed.
Thus you can see, that AND is no operator, but a setting at edges, which is
apart from every other settings with the criterion of a certain value as
result.
Only this value as a result is logical, because effected by the values H,L of
inverters, which can get a meaning in a following relation, which isn't aware
of ANDing or ORing. Thus an edge is a 'horizone of event', where arguments
with many places fade and thus every 'sense' of those arguments, if they are
ORed.
You know, that Boole's algebra is the theory, on which computer technic is
based. But a lot of practical things where found and added to that technic too.
A technicality i.e. are data-busses, which are indeed logical edges, but are
not used like that in practice. Instead of this, electronical technics to
reduce parasatic capacity are used, which are in detail circuits to 'float'
outputs.
Such things I call here to be 'not logical', because I cannot express them
using inverterlogic symbols. Thus the discussion of such things does not only
depend on logic but physics too.
The evaluation in the 2nd direction is opposite to that not really useful as
transistor-circuits, but useful for mathematical consideration. The first step
in that direction is done in the next chapter.
1.2. POSSIBILITIES
Now shall be intended to play with those things we got as toy to get more and
mainly something, which can impress as insight.
I will start with some doing and taking a fancy to using conveniant notions for
that doing, which I derive from usage of language.
NOTION: 'quantity'
A quantity is a lot of things, which can be distinguished from the rest of the
world, but belong to one another in a certain respect.
Such quantities are likely built heaps with an destination only in the eyes of
an observer. If any quantity will be significant in a connected relation, a new
expression will be made.
NOTION: 'possibility'
...is that part of reality, which needs not to be, but may be.
Every possibility can be distinguished from other possibilities.
This is the normal usage of this notion. According to inverterlogic, there are
two kinds of possibilities to distinguish. I will demonstrate as well, how
possibilities appear logical.
I start with series:
I show two series, which are not connected, and show the arguments above the
inverters:
1. 2. 3. 4.
L H L H L H L H H L H L H L H L
--->->->-> --->->->-> --->->->-> --->->->->
L H L H H L H L L H L H H L H L
--->->->-> --->->->-> --->->->-> --->->->->
We now look at a choice of four inverters, two of them placed in the same line
as first and second one.
We realize, that the 1st setting becomes the 4th setting, if we go deeper by
one place doing nothing more than replacing the arbitrary order defining the
1st place in the depth. In the same way the 2nd and the 3rd setting become the
other settings if we change the order in one line only. Thus we recognize, that
the possibilities of settings created by changing arguments are the same as
changing the view of places or move places in the line.
So we found to kinds of possibilities for an observer to get every possible
setting. Now I translate the possibilities of observation to a relation of two
parallels, a field, which is effected by an origin.
1. 2. 3. 4.
L H L H L H L H L L H L L L H L
o-->->->-> o-->->->-> -o--->->-> -o--->->->
| L H L H | L L H L | L H L H | L L H L
o-->->->-> o---->->-> -o->->->-> -o--->->->
Either both parallels are inverted or the one or the other one. This is the
same as playing with different possible arguments.
Now I show a field, where inversions are the continued principle. At left hand
side the buildingstone of such a construction is to see, at right hand side
two and finally four such connected buildingstones.
L H L H L H L H L H L H L H
o->->- o->->->->-- o->->->->->->->->--
| L L | L L H H | L L H H L L H H
o--->- o--->--->-- o--->--->--->--->--
The values in the columns obvious change periodically and every possible
setting occurs, even if the paralles are changed.
The same occurs at four parallels:
L H L H L H L H L H L H L H L H L
o->->->->->->->->->->->->->->->->->-
| L L H H L L H H L L H H L L H H L
o--->--->--->--->--->--->--->--->---
| L L L L H H H H L L L L H H H H L
o------->------->------->------->---
| L L L L L L L L H H H H H H H H L
o--------------->--------------->---
Every possible setting occurs too and independant of changing parallels. Only
the sequence of values in columns is changed then. There are possibilities for
such sequences, which grow due to the count of parallels too.
Next to there is to state:
Connecting the parallels to an origin made a relation out of a view of series.
As you can connect branchings in the columns, the artificial interpretation of
an observer has become logical and may be an argument of any relation.
This makes evident, that the interpretation, which was assigned to an observer
and his own will, is in fact the character of the relation.
Also the sequence of values in places and columns has become something to
distinguish from other settings:
EXPRESSION: 'dat'
...is a set of values H,L in places. If the count of places is of interest, a
decimal number is used as praefix. Else a dat contains any count of places.
EXPLANATION:
This expression replaces arbitrary defined expressions as 'Byte', 'Word' a.s.o.
and expresses the well known 'bit' as '1dat'.
Eight values H,L in a certain sequence are a certain 8dat. The sequence is
unique - the 4dats HHHL und LHHH are not equal. But other assignments besides
this are not useful and shall be differently expressed.
The qualified bit will be expressed always as H or L, which can in fact
characterize more than an argument in one place.
1.2.1. ADRESSES
Now I will make branchings from the parallels in the most simple way:
I connect every place in every column with the odd entries of one edge for each
column. Only one of these equal edges results H. This edge ANDs the origin.
If inverters are connected between a parallel and every entry there, there is
anyway only one edge, which will result H. But this edge is not a branching at
the origin. You can state too, that there is only one certain edge ANDing
for every possibility of values in a column, so that the quantity of possible
values in columns is exactly equal to the quantity of possible ANDing edges.
To distinguish edges from others, if there is of interest, which exit is
connected to which even oder odd edge-entry, we need a further notion depending
on those special edges.
NOTION: 'adress'
...is the value H at an exit of a certain edge, which is a branching with
certain entries from exits, where a certain setting of values H,L occurs.
A certain adress corresponds to a certain dat, being the value of the adress.
EXPLANATION:
I did not mention a certain relation, where the branching to the adress should
be, because only the even or odd entries and the values there characterize the
adress.
Thus I exposed something consisting only of inverters, their connexion and
their values. That are logical facts.
Similar stating triumphing values at edges to make the efficacy of connected
exits logical, I now state the value H as that result of an edge, which allows
to distinguish different edges, which are branchings at the same places, being
the logical aequivalent of possibilities of values at those places.
Thus an adress is characterized by a certain setting of values H,L at the
entries as well as the relation itself. Both qualities will be expressed with
the same word, if the dats are of interest, which effect a H. These dats are
expressed as 'value of an adress' too, if they are to dinstinguish from the
relation.
Using the notion 'adress', I am now able to express the rule, which was for the
first to find only because of structured places in a considered table.
RULE:
The count of possibilities for settings in columns is equal to the count of
possibilities for adresses, which can be branchings at that places.
Thus an adress allows to select a certain possibility.
A certain adress results this possibility as H, while every other possibility
will be resulted as L.
If you consider every address as a relation including every inverter till the
origin and shorten the even series, you can express the above stated rule in an
other way:
RULE:
Every possible adress, which is a branching at a certain count of exits, is to
distinguish from each other by at least one less or more inverter, connected to
any entry.
Starting at this statement, you can distinguish quantities of adresses.
NOTION: 'complete adress-quantity', 'uncomplete adress-quantity'
An adress-quantity is complete, if every possibility of settings at the entries
exists.
It is not complete, if not.
EXPLANATION:
Now there may be of interest, how much inverters need to be part of my field,
if I want let appear all possibilities of settings at entries of adresses.
There is manifest, that I needed at least two inverters in the lowest parallel.
In every other parallel there are double as much inverters as in the next lower
parallel. Thus you need to calculate the count of parallels as the power of the
2 at least needed inverters to get the count of possible adresses, which can be
branchings at the parallels. The simple calculation of the total count of
inverters is not of interest, but the relation between the count of parallels
and the at least needed two inverters, which is always true.
Adresses are results at edges, which can be L too and then do not result any
other setting at the entries clear-cut. Thus a notion shall be made, which
depends on relations effected by a H at an exit of an adress.
NOTION: 'significance'
You can assign significance only to an adress in connected entries.
While efficacy appears in the direction from entry to exit and thus exists
inside a relation, the significance can appear only effecting a next relation,
which is not defined by principle. But a significance needs to be effected by
the result H of adresses to be distinct. Other relations can be inserted too
between an adress and a relation making the significance.
As the result L is anyway possible, therefore a next notion is needed:
NOTION: 'insignificance'
...is the absence of an adress.
These notions will be needed whenever certain dats at entries of edges shall
effect certain settings different to every other possibility.
In this respect relations can be distinguished, which make significance
different to others, which connect in any way. Thus significance is the
character of relations, which are effected by the value H at an entry.
Of course the value H can appear inverted in the depth of a relation.
1.2.2. NUMBERS
I found already a way to build relations, where complete quantities of adresses
can branch by using a principle of design. Now I want to extend consideration
and show possibly infinite counts of parallels and branchings of complete
quantities of adresses there.
As till now a relation was treated to be not existant, if it is not written
explicitely, expressions are needed, which allow to spare paper, if lots of
parallels should be written. This task is done by making readable sentences out
of principles of design. Then the whole relations need not to be written.
Instead to refer to adresses I will now consider the settings at their entries
and make therefore a notion, which contains a sorting of possibilities too.
NOTION: 'numbers'
...are settings of values H,L at the entries of complete quantities of
adresses, each one greater or smaller than every other one and not equal.
EXPLANATION:
This seems to be the commonly used description of a number.
But different to usage, wether the size nor the validity of places are reasoned
by any algorithm. I start with relations built due to principles of design
instead. Only such principles enable to define relations beyond the paper at
infinity.
Now the difference between a number and the next smaller or greater one is not
the element and the number 1, but the one inverter, which makes the difference
between any adresses in a complete quantity of adresses.
In the already showed field containing continued inversions now the values of
the inverter are replaced by the digits 0 instead of L and 1 instead of H:
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
o->->->->->->->->->->->->->->->->->-
| 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0
o--->--->--->--->--->--->--->--->---
| 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0
o------->------->------->------->---
| 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0
o--------------->--------------->---
This interpretation leads to something in the columns, which is known as dual
digits. The last significant places are above the others and significance
increases downward. The worth of numbers increases to the right.
I erase the values now to demonstrate the principle of design:
o->->->->->->->->->->->->->->->->->-
o--->--->--->--->--->--->--->--->---
o------->------->------->------->---
o--------------->--------------->---
The principle of design, which was needed to effect the possibilities of
settings in fields, appears more powerful and shall be descripted due to the
new purpose:
In a parallel, which is below and shall be "most significant", are two
inverters. In the next parallel above, which shall be "less significant", are
two inverters in the same comlumn and in columns at the left are two more
inverters. For every pair of inverters in higher, "less significant" parallels,
this kind of nesting is repeated.
The reason why I do not prefer any principle of design as very important,
elevated or natural one is, that other principles are to find, which are not
really less or more worth - for example:
A 1 is moved through three places step by step, till the 1 reaches the most
significant third place. In the next step all places are changed to 1 and then
is a 0 moved through the three places. When the 0 reaches the most significant
place, all places are changed to 0 again - starting a next period.
more significant places are processed in the same way but a step is only done
after the lower three places are changed to 0 again.
0 1 0 0 1 0 1 1 0
o->->--->->->--->----
| 0 0 1 0 1 1 0 1 0
o--->->->--->->->----
| 0 0 0 1 1 1 1 0 0
o----->------->------
This makes evident, that other relations enable also branching to complete
quantities of adresses, but do not effect the known sequence of dual digits.
If the count of places would be infinite, the count of possible principles of
design would be infinite too.
You will see later, that I took care to use the subjunctive here...
For the purpose of distinguishing single numbers from the quantity built by a
principle of design I make the...
NOTION: 'numbersystem'
...is the quantity of numbers, created by a principle of design, which is
different to every other possible ones.
You can instantly see too, that the adresses connected at the columns, which
were still kept in mind, can mean an other setting than that at the entries.
Such a significance is shown here for the fourth column in the picture above:
0 1 0 0 Adresse =H 1
o->->--->------------------->O-----o->>-
| 0 0 1 0 | | 1
o--->->->------------------->O o->>-
| 0 0 0 1 | | 0
o----->-------------------->>O o-->-
By this way you get in the fourth column the dual digit 011, which should be
there, if you want dual digits in the known sequence.
This assignment of two different settings, connected by an adress shall be
the next...
NOTION: 'sign'
...is a quantity of inverters, which result the value of an adress, effected
by an adress.
Analogous to adress-quantities I make some other notions depending on
sign-quantities.
NOTION: 'complete sign-quantity','incomplete sign-quantity'
A sign-quantity is complete, if a complete adress-quantity can be argumented.
It is not complete, if not.
A sign is the most simple form of a significance. It is a medium between
relations, which is important, when deeper relations are considered. Here it
seems to be obsolet and too complicated reasoned.
But it is the logical form of possible settings in columns and thus a part of
a relation, if connected.
It is manifest, that signs can be used to make equal systems of digits out of
different numbersystems.
A special sign is the 'origin', which appears now as the exit of an inverter,
whose entry is connected at an adress.
If I only want certain values at certain entries, I will use the more general
expression 'giver', which can be a sign or an origin.
EXPLANATION:
I now have not commonly two common things derived, 'numbers' and 'signs'.
The not common way is well reasoned:
I started with the inverter-axiom and got only two values H and L. If I want to
express values, which could be infinite great and could occur in infinite
quantities, then I need to combine places containing the values H and L to
something larger, which needs to be logical and therefore needs to be a
relation between inverters. So 'numbers' are to derive from possibilities of
settings in a count of places at pleasure.
But I did not have to define, which places should be higher than others and
which numbers should be greater than others.
By this way, immense quantities of numbersystems are possible, distinguished by
valence and and significance of places, which can be changed at pleasure and
this totally without rules.
But despite of those immense quantities we found something, which is equal to
all those numbers. It is the count of inverters at entries of adresses, which
built a complete adress-quantity. Thus we can get anyway an idea of 'natural'
numbers, but think indeed of a count at pleasure of possibilities for valence
of places, which are ever the same possibilities of settings, but in different
sequences.
These numbersystems can be made to one using signs. Nevertheless there can be
created digits naming the numbers at pleasure - in example:
10 dual = 2 decimal = III roman = c alphabetical ...
While the common "numbers" seem to be a complete notion only if carries and
operations are defined, we will see, that this way will lead only then to the
common "numbers", if certain ways to make a carry are very arbitrarily
favoured. The quantity of possibilities to make carries is namely immense too.
This statement might be astonishing, but will instantly be treated as true, if
any cyphered code is imagined, which in fact does not change the cyphered
numbers, but the making of carries and significance. To make notions by
favouring a certain making of carries and significance as 'uncyphered' or
'original', is not the way to make notions, I like to go.
I make the notion of 'numbers' instead out of nothing else than elementary
connexions and a pleasing notion of 'greater' and 'smaller' values.
Even though I got something by a trick, which others found more complicated to
be the most 'natural' numbers, I could demonstrate on the same way, that
these most natural dual numbers are in fact dual digits, and that the base of
all numbersystems cannot be a numbersystem in a conventional sense.
Thus a certain making of carries and significance can only be favoured in a
practical sense. And may be allowed.
Besides that other "numbers" are to consider, which are made by negotiation of
others - 'not divideable', 'not periodical' a.s.o...
While numbers in the inverterlogic are an other side of adresses, those are
different too to the common usage of this notion abstracted from that other
side.
The conventional sense of 'adresses' in the space of computers namely contains
certain meanings built in adressregisters and busses and thus is aequivalent to
the here made notion of 'numbers'. This is considered in the chapter 2.2.3.
As operators and carries can not be considered using elementary connexions,
this topic will be discussed later under 2.xx, where I also demonstrate the
advantage of this way - which nevertheless is the only one, starting at the
inverter-axiom.
1.2.2.1. DIGIT SYSTEMS
As already said, there are possibilities at pleasure to define number systems.
There are possibilities at pleasure too, to digitize values, which can be
extended to digit systems, which can be represented too by values of adresses,
but are not build using complete quantities of adresses.
Historical considered digit systems were obvious.
The reason may be, that human beings started counting their limbs at hand and
arm. Origines in Papua-New-Guinea i.e. have a notion of numbers, while making
digits out of first the fingers, then wrist, elbow and finally shoulder. By
this way you can distinguish 8 digits. More is not available, because the
making of carries was found elsewhere - in India and using the Abacus. The 10
as a base was obviously derived too from the count of fingers.
Also the Maya found making carries in their digit system using the base 5,
which enabled them yet to make the most precise calendar, which included the
phases of Moon and Venus too.
We carried the decimal digit system through. It is not ideal as well as other
digit systems, where other prime numbers besides 2 are used as base. I will
show this in a example using the decimal digit system with the according
field:
1 2 3 4 5 6 7 8 9
o->->->->->->->->->->->->->->->->->->->->-
o--->--->--->--->--->--->--->--->--->--->-
o------->------->----------->------->-----
o--------------->--->--------------->--->-
o------------------->------------------->-
o--------------------------------------->-
10 12 14 16 18 20
You can instantly see, that this field is not ordered as simple as the dual
digit system. Besides that it shows the BCD-format (=Binary Coded Decimal),
which is common in computing numbers. There are always certain values in 4
parallels kept unused. But this does not prevent of constructing operators
(demonstrated under 2.1.3.2.1.). But it will be more complicated and makes more
inverters needed, because the relation for one place can not be made equal for
every place. This makes the need to dinstinguish numbers from digits as well as
the fact, that you are not able to build digit system using complete quantities
of adresses.
SUMMARY 1.:
Finally I want to relate the inverterlogic to reality:
Some reader might be already convinced, that the inverter-axiom is suited to
base the logic on it.
But he might be astonished too about that, what can be reasoned for the world,
where this logic exists.
There is the familiar difference between that, what is transfered using symbols
out of a world of ideas to the world, where we live, and just that world, where
we live. Both worlds seem to be connected only by lower jaw and volubility of
an elevated species. I still accept that difference and based my consideration
carefully on it. The difference shall be seen till I can lead to a world, where
it does not exist. And I will need less words than Spinoza or Kant:
The most important first statement is, that the inverter-axiom connects both
worlds inseparable, because it does not prohibit connecting the exit of an
inverter with its entry.
Such a restriction would not only ugly extend the axiom, but would have caused
a lot of other increasing arbitrary restrictions. A lot of connexions, which
are considered next, needed to be set apart from logic.
On the other hand making less restrictions makes logic get a dimension, which
is excluded in our normal way to think of logic:
time
If we imagine that inverter, whose exit is connected to its entry, we can
instantly see, that there can not exist an efficacy as should be.
All inverterlogic would fade, if there would made traditionally a difference
between a result, which is gathered from an argument, and a result, which
follows an argument. A second consideration eases the needed decision. There is
to say, that nearly nothing duration of efficacy is needed to make the logic
exist again and even in this world, where we live and come to know logic.
And this world is not only the home of logic, but of a time too, which goes as
efficacy only in one direction. Even if you could want to make a difference
between a 'logical' and a 'physical' time, I will demonstrate next, that this
kind of thinking makes giddy, and that it is an elevated arbitry act, to place
the logic beside the world by abstracting it from time.
Anyway I will consider both possibilities till I got enough arguments for a
single time.
But I will not consider the physical dimensions of logic in detail while
considering the inverterlogic. Only the duration of efficacy will become so
imposing, that it needs to be noticed.
But I will have said, that in stating physical dimensions of the logic the
most exiting effect of the inverterlogic can be seen.
2. LOGICAL MACHINES
Considering the elementary connexions I derived the second extension-rule, but
did not use the extension for anything else than to make it superfluous with a
shortening-rule.
Now I will consider relations containing more than one edge, where edges can
not or shall not be shortened.
These will be deeper relations.
As we found, that an edge with even entries can be rather superfluous, we now
proove the permanence of an edge with odd entries. We evaluate a shortening
analogue to that one, which reasoned the second shortening-rule, but choose the
reverse direction of conclusion:
----->>O ----->>O---->O ----->>---->O ----->O
----->>O--->O ----->>O---->O ----->>---->O ----->O
| | | |
----->>O--->O ----->>O---->O ----->>---->O ----->O
----->>O ----->>O---->O ----->>---->O ----->O
This description starts at two edges connected to odd entries of a following
edge. If we proove the results in every possible setting, we can astonished
state, that this is something new, which can't be shortened using the first
shortening-rule. Especially the third step of evaluation is not done right.
Edges with even entries are not as superfluous as they seemed to be!
We will find during the following consideration, that this reasons the whole
variety of logical connexions.
Because of this I explicitely state a rule, which forbids:
RULE: 'first shortening-prohibition'
Shortening must not be done, if exits of edges are connected to odd entries of
a single edge.
If there are additionally even entries besides odd entries, the question is, if
anyway the second shortening-rule is true. In fact this shortening can be done,
if it depends on those edges, which are connected only to even entries.
Thus the following conversion can be made:
----->O ----->O
----->O---->>O ----->O
| |
---->>O | ---->>O
----->O---->>O becomes: ----->O---->>O
| |
----->O | ----->O |
---->>O----->O ---->>O----->O
This shortening can be obvious transformed reverse to an extending. But this
shall not become a rule, because it is a trick, which can be easily derived
from already stated rules.
EXPLANATION:
Inverterlogic where already at an end, if the first shortening-prohibition was
not seen!
Thus we make a notion due to this, which we will refine in the following
consideration making sub-notions, depending on next details:
NOTION: 'logical machines'
...are relations consisting of at least one edge connected to an odd entry of a
next edge.
EXPLANATION:
Thus we made a difference between already discussed numbers and fields with
branchings of adresses at the one side and relations at the other side, which
are not only deeper but contain more branchings in the depth.
2.1. STATE MACHINES
We can presume, that the notion of logical machines should be split.
We need not to meditate on this, but split off for the first that kind of
relation, we just considered. This kind of relations is distinguished by
arguments, which effect results unequivocal and totally synchronous to changes.
Every setting is independant of any settings before the actual one. An other
way is possible, if values could be stored, so that some values remain, while
others are changed.
And I mentioned already, that time is important in the logic.
Thus we need a notion to distinguish relations, where values can be stored,
from those, where nothing is stored.
NOTION: 'state machine'
A logical machine, where all possible settings can occur in every possible
sequence, is a state machine.
2.1.1. COMPARATOR
We start now to fancy out the possibilities in connecting edges at odd
edge-entries and follow up first the idea, that an edge could make us capable
to distinguish two signs from each other.
We focus on the places in a sign, because they make the character of a sign and
contain the values, which we can connect logical. For comparison of two signs,
we need to connect every place in one sign with a place in the other one, which
shall be of the same grade, while the sequence of grades is still arbitrary.
Such a comparison obvious can't be done at a single edge. There can't be ANDed
a H as well as a L.
Thus we need one edge with even and one with odd endge-entries. The exits shall
be connected at odd entries of a next edge, looking like that:
place x of sign A ----------o---->O
place x of sign B ----------X-o-->O->O- result y
| | |
| o->>O->O
o--->>O
When we look at the possible settings, we can state, that this relation results
a L, whenever the two values at the entries are the same, so arguments HH or LL
at places x
Else H is effected by the arguments HL or LH.
In this way two signs can be easily tested for equal values in all places by
connecting places like this and finally connecting all results y at odd entries
of a next edge, where values L are ANDed.
Before we look more critically at this relation, we make the efficacy a
NOTION: 'XOR','XORing'
XOR is a relation, where an argument made of two values effects one value, if
the values in the argument are equal ones, and effects the other value, if the
values in the argument are not equal.
The corresponding efficacy is XORing.
EXPLANATION:
The XOR (='eXlusive OR') is known as some of Boole's operators, but is not an
elementary connexion in the inverterlogic as the other Boole's operators. As
you can see, there is not only one edge needed.
Besides that in Boole's algebra there are certain values as results of XORing
defined - I did not do that.
Because of this, the efficacy is not defined here using a table of values.
The relation namely shall be considered in coherence to other things and next
in respect to a peculiarity, which isn't stated nor in Boole's logic neither in
algebra.
First, there was to see at the exit, if the values at the entries are equal or
not. This is independant of beeing both H or L and independant too of replacing
the one pair of unequal values by the other one.
Only the inverterlogic makes logical, that the above shown relation effects the
argument at one entry inverted, if the argument at the other entry is H - in
short: this is a switchable Inversion.
Besides that, there are different ways available to invert the result.
ERGO:
...we are able to refine the notion of a 'state machine'. The XORing relation
is an example for a peculiarity making values at one entry change the efficacy
and not only the result as known from elementary connexions.
NOTION EXTENDED: 'state machine'
A logical machine consists of connected edges, where the efficacy can be
altered by a value at an entry.
EXPLANATION:
So some state machines are to distinguish from others, where efficacy can not
be altered by any value.
Thus the here defined XOR is the origin of a peculiar quantity of relations. As
these relations are really nothing depending on Boole's XOR, we make a new
notion, which depends on the above shown XORing relation in example, but is
universal enough to include variations as well as extensions at the entries:
NOTION: 'comparator'
...is a connexion of exactly two edges at odd entries of a next edge, which is
capable to change efficacy by a value at any entry.
From the above shown relation we can derive an expression too, which eases to
express the principle of design, which was the starting point of consideration:
EXPRESSION: 'even branch','odd branch'
If there is a branching made to entries of different edges, which are connected
at one next edge, then the efficacy of an even count of inverters is an even
branch, while an odd count of inverters in a branch is an odd branch. Also the
inverters layed at the last edge are to count.
EXPLANATION:
Although it is arbitrary to count the inverters at the last edge too, I
decided the view, which relates the value of the result to the value at the
place of branching. Thus the value H is effected along an even branch as a
value H as result, if there is no other branching triumphing with the value L.
A simple variation of the above shown XORing relation demonstrates, how
important the situation of even and odd branches can be.
---o---->O ---o---->O
---X-o-->O->O--- ---X-o->>O->O---
| | | | | |
| o->>O->O | o-->O->O
o--->>O o--->>O
While at the left hand side each edge is connected by either even or odd
branches to the places of argument, at the right hand side two branches are
changed by each other.
You can easily state, that the relation on the right hand side XORs too, but
inverts the result.
But you can also state something astonishing considering the variation more
critical:
While at the left hand side unequal arguments HL or LH can't be seen behind the
first edge looking at the result, the right hand side variation allows still to
distinguish them. Such a relation is needed, if the result shall be used for
switching at next edges. Then ways of shortening can be found.
Now we repeat the demonstrated variation less intuitive to find a rule:
--->->-o-->>O --->-o->->>O --->-o---->O
-----o-X-->>O->O ---o-X--->>O->O ---o-X--->>O->O
| | | | | | | | |
o-X--->O->O o-X---->O->O o-X---->O->O
o--->O o->-->O o--->>O
At first can be stated, that the above shown inversion of the result is gone
by inverting one entry. This is not as next as a inverter at the exit for the
same effect.
Making the varitions, I extended in a first step an entry with an even series.
In the second step I did something new:
I changed an inverter before a branching to one inverter in each branch. You
can easily find this done right and get an new rule:
RULE: 'first converting-rule'
An inverter before a branching can be changed to an inverter in every parallel
behind a branching. The change can be done reverse too.
We do not look at other variations, which are some more, but consider first
the inversions of arguments and results.
There is evident, that the result is inverted independant of inverting the one
or the other entry or the exit. If there are both entries inverted, the result
will be still the same.
A relation was made to get this statement, which could be verified with giving
values too. So I demonstrated, what I mentioned already: the comparator is a
switchable inversion.
Switchability of relations using values is demonstrated too for this logical
machine.
Starting at the first showed comparator we now consider such relations, where
the connected first edges are wider.
No picture is needed to state:
If the count of entries is extended at pleasure at both edges, the one with
only even, the other with only odd edge-entries, then an edge with odd entries
connecting both edges results a L, if the arguments at all entries consist of
equal values H or L in every place.
If any value at any entry is changed, the relation results a H.
Switching of the relation is not changed in the way, that any value at the
entries will be inverted, because there is more than one value, while the
result is only one.
But an other way of switching can be stated astonishing:
A single value H at an entry is enough, even if a L is at all other places, to
let the ANDing edge ORing and because of this inverts the result.
RULE:
In Comparators with more than two entries no values are inverted, but the
efficacy can be changed anyway. The switching entry then switches the ANDing of
an edge to ORing.
As such relations are not of interest here, this switching of efficacy will be
considered in other context.
But I want to come to a shortening-rule, which is easy to find, if you try to
vary a well known relation, which is XORing too, so that it becomes the the
above shown relation. This other relation is well known, because it is made out
of 4 NAND-gates, which are easier to manufacture:
edges: 1 2 3
place x of the sign A ------o--------->>O
o->>O>--o->>O>->>O>---- result y
| | |
o->>O o->>O>->>O
place x of the sign B ------o--------->>O
Using the first shortening- and the first variation-rules we get:
edges: 1 2 3
place x of the sign A ------o--------->>O
o->>O------>O--->O>---- result y
| |
o->>O------>O--->O
place x of the sign B ------o--------->>O
Now the relation seems to be more familiar. Not familiar is the connexion of A
and B at the edge 1, which can't be shortened using any already found rule.
After the conversion we can see, that not only two branches A and B are crossed
with each other argument, but that A and B are connected at edges 2 to
themselves, so that the value at A and B block there, if not the other value
is a different one. These connexions of A and B to themselves across the edge 1
is obvious superfluos.
Because of this, we can confine the connexion on those branches, which connect
A and B at the edges 2. This looks like that:
edges: 1 2 3
place x of the sign A ------o--------->>O
| o------>O--->O>---- result y
| | |
o---X------>O--->O
place x of the sign B ----------o----->>O
The inverter at the exit has been already discussed.
As this kind of shortening allows to easily demonstrate complicated algebraic
equations as evident, I will discuss in detail, what there is superfluous under
which circumstances. Therefore I dissect the branches in question:
edges: 1 2
A ---o--------->>O
o->>O------>O--
B ----->>O
A is connected with itself at edge b along an even and an odd branch too.
Because of this A effects a L in every case and every roundabout over edges 1,2
could be replaced by a giver of the value L.
But there is a connexion to the argument B too at both edges 1,2. Only then, if
the argument A =H and the argument B =L, there can be resulted a H at edge 2.
Thus in fact A and B are connected at edge 2 as shown above, and the edge 1 is
superfluous.
Now a vary the edge a, so that the both branchings of A, connected finally at 2
are not inverted to each other:
edges: 1 2
A ---o--------->>O
o-->O------>O--
B ----->>O
By this the argument B becomes irrelevant for the result.
Then all connexions of A and B are superfluous.
If the initial odd branch from A over a would be made even at edge 2 ( 2 even
entries), then the second shortening-rule can be used. The uppermost branching
from A needs to be extended by an even series then, thus connecting A at two
even entries with the edge 1, while edge 2 vanished.
RULE: 'third shortening-rule'
If in a relation one argument is connected along more than one branch at an
edge, so that only one value can be effected, then every connexion with other
arguments before that edge can be replaced by only a connexion at the last
edge. In that case the other branches need to be kept as even or odd as before
the shortening.
An extending-rule could be found here too, but this will be hardly of interest.
As we could see already, that occassionally whole branches and included
connexions can be shortened, the case of not blocked arguments is to consider
more critical too. Last showed was the case of an argument beeing connected
with other arguments in an occassionally immense deep relation, so that those
agruments are in fact irrelevant. Those connexions are logical anyway, though
not in normal sense. But as they are logical, they can be shortened, and by
this there can be stated a relevance for consecutive significance. The case of
arguments, which are not really arguments is well known and can be demonstrated
by this way.
RULE: 'fourth shortening-rule'
If an argument is connected with other arguments, so that those can not change
an result at an edge in the depth of an relation, then these arguments and all
their connexions are irrelevant and can be shortened.
EXPLANATION:
Such irrelevant connexions can only be stated by prooving all possible settings
for redundancy.
Besides the irrelevance of arguments in certain relations there can be seen
without a picture, that arguments may be connected finally at an edge ORing
more than one branchings effected by an argument. Under 2.1.3., I will show
such a case, which is normal, if there are two sides in an equation, which
shall be demonstrated as equal, but seem not to be equal in respect to the
signs. At first the rule will be stated, which is easy intelligible.
RULE: 'fifth shortening-rule'
If arguments are connected with other arguments in more than one aequivalent
branches, which are finally ORed, then only one branch is needed, while the
other ones can be shortened.
EXPLANATION:
The expression 'equivalent' means as usual equal results due to certain
arguments, while the branches need not to be the same relation, but need to be
shortable to the same relation.
I knowingly avoided to make up the known notions 'tautology' or 'redundancy'
in this statement, which depends on more, than those notions depend on.
2.1.2. SWITCHES
We now consider relations, where results are effected at more than one exit.
We start with that variant of a comparator, which different to the others
allowed to recognize the state of the entries from behind the first edges:
A -o-------->>O------ R1
S -X-o------->O
| |
| o------>>O
o--------->O------ R2
You can easily state, that A and S can be changed to each other on principle.
You can easily state too, that equal values at A and S effect a L at both
exits. By the given meaning of the entries you can force with the value at S
either R1 or R2 to result L, while changing the value at A effects the other
exit. The value at A appears not inverted at R1 and inverted at R2, where of
course an inverter could be appended. But this inverter will disturb the
symetry, because of inverting the result of S too.
If the value at S shall be used to let the value at A effect either R1 or R2,
then unequal values at A and S are needed. The value S=L then lets an A=H
as R1=H and a S=H lets A=L as R2=H appear. Only the values H at R1 and R2 may
get significance and thus only certain values at A related to one of both
entries. The other values need to be insiginficant, because then A and S are
ORed. This has been reasoned already under 1.2.1.
As indicated under 2.1.1.1. for the comparator, there are variants here too,
which are hardly of interest. In every variant it will be needed too to
distinguish significance and insignificance.
NOTION: 'switch'
...is an edge, where results shall get significance or insignificance due to
the value at certain entries.
EXPLANATION:
The needed insignificance at switches demonstrates the notion 'significance'
as important and not arbitrary, if an edge for this purpose is considered.
This needed insignificance excludes on principle, that a serial sequence of
values H and L can be sended from the exits, because the repertoire of values
is halved to one value.
Inside a relation the situation may be changed, if the value at S keeps
connected to that one at A. Then two lines for results are needed, namely a
second for the value at S. As in a comparator, two different efficacies are to
distinguish, which can get significance only connected.
I still have to discuss now, why the different notions 'AND', 'adress' and
'significance' are useful, although they all are derived from the result H at
the exit of an edge. The three notions distinguish certain parts of a relation
related to that value.
'AND' relates to values at entries.
'adress' relates certain entries to possibilities of settings there.
'significance' relates to effected relations.
I always mentioned while making the notion, why the results H and L must not
arbitrary be assigned to significance.
Now the notion 'significance' shall be completed in respect to something very
confusing in algebra:
The negation - the algebraic NOT(...), mostly expressed with a line above
negated symbols.
I do not want to discuss such logic in detail, where the two values 'TRUE' and
'FALSE' are used to verify something.
With the here made notions 'significance' and 'insignificance' I will avoid in
every case those statements, which should be taken as logical reasoned right,
but are in fact nonsense.
The starting point of making the notion is the edge. This relation is the only
one, which is capable to make two values like 'TRUE'=H or 'FALSE'=L out of a
lot of places in a dual system, which represent arguments.
There is to say, that the result 'FALSE' at an edge represents things as much
as you like, which are ORed and can not be a single thing, which could be
compared with any other thing.
If such undecided things can become 'TRUE' only by inverting, then there is
obvious nothing really false, because one uncertainty can be made true and
equivalent to any other uncertainty.
Finally the switch demonstrates, that switching entries need to effect the
value 'FALSE' to make any effect. As in fact there is nothing to make evident
or to compare without switches, which are a part of comparators too, the
switching values must not become any significance.
Looking at an edge, you easily can see, that there is not only one FALSE
argument. Already an argument made of only two places consists of three FALSE
possibilities. Till now a mathematician can arbitrarily make equations
containing these reverse arguments or not, and because of this can calculate
nonsense too.
I distinguished already inversion and inverter.
Now I distinguish negation and inversion:
NOTION: 'negation'
...is inverting significance to insignificance, which can't be reverted.
EXPLANATION:
By this negating is reduced to operating significance only and is not
equivalent to any inverting.
This notion of 'negation' forces to explicate significance out of significance,
while the value H can be inverted anyway without a loss of the assigned
significance.
This will be demonstrated by operating of numbers under 2.1.3.2.1.
On the other hand a value assigned to insignificance must not get significance,
even in the depth of consecuting relations. But there can any thing to negate
made significant anyway.
There has to be no doubt, that values of inverters are logical, but not true.
Only then, when truth is in principle not a value, then inverterlogic can make
evidence.
Evidence then is connecting significant values due to any kind of significance,
while insignificance does not touch significance.
This way excludes, that a usage of negation, which can commonly represent the
rest of the world, becomes any concrete thing.
The here made notion avoids, that any NOT(ape) becomes human, because a human
is a NOT(ape) too.
2.1.3. ADRESS-QUANTITIES
Inverters are elements to make quantities out of them only then, if they are
connected in a relation and become significant using adresses.
Thus quantities of adresses are that, which is suited to make elements of
quantities, as they are subjects in set theory.
A field ist the most simple relation, where distinguishable inverters exist.
But you can easily see, that other relations can be connected to entries of
adresses too and thus can become elements of quantities. This is needed, if
numbers or any other significance should be considered as quantity.
Even if quantities are only to distiguish, these quantities need to be
adress-quantities, which can be assigned as usual to any significance, which
also can be connected to other ones.
I use the notion 'logical machines' for such relations, because they are deeper
as adresses in every case.
Here is an example for explanation purpose:
A well known equation in set theory (here 'quantity' is equal to a 'set')
relates the conjunction of sets to the average of those sets. As I can not use
here the familiar signs, I will use the operator OR to define the conjunction
and the operator AND to define the average of three sets A,B,C.
The equation is:
A AND (B OR C) = (A AND B) OR (A AND C)
This equation shall be demonstrated using relations, where the value H is used
as TRUE, thus shortening the equation to H=H, while A,B,C appear at the exits
of edges with even entries as a set, while the adresses of each elements are
ANDed there like this:
element1---->>O
elementx---->>O--set of elements 1...x
The equation looks like this:
left hand side: = right hand side:
B----->O>-->>O-H B----->O>---->>O
| | | |
A------X--->>O A-o----X----->>O---->O>-H
| | | |
| o----X----->>O---->O
| | |
C----->O C----->O>---->>O
I showed the relations in such a way, that easily can be seen, that at the
right hand side A is identical connected twice to the edge, where B and C lay.
There is no doubt, that only one connexion is needed and no next ORing.
This is the use of the fifth shortening-rule, while the use of the first
shortening rule at the even entry, where the edge of B,C lay inverted, leads to
the conclusion, that this is a logical machine. This relation effects a
significance, which is suited to be compared with any other. This equation then
could be resulted with an edge with two even entries (Boole's AND) as the value
H=TRUE.
But that is not the desired evidence, which can only be demonstrated by varying
the one relation till it is the same as the other one.
Thus the evidence has to be demonstrated by comparing the settings after the
conversion and not the results (if you do not trust in a glance at this banal
demonstration).
If sets (or quantities) are represented by ANDed adresses, there has to be
very strictly distinguished, if relations depend on the united elements in a
set, or depend in fact on the elements in a set. Then the values of the
adresses were to connect instead of the ANDing edges with even entries.
Thus there is to show more in detail, how to make relations out of equal or
similar terms in set theory and how to deal then with significance.
Nevertheless set theory does not only allow to consider values as elements of
sets. But if elements can not be represented by a value for each element, then
they can not be represented by adresses too. Thus relations, which are
characterized by more than one setting in every case, can not be elements of
sets, which are ANDded adresses. Even if you consider to represent a relation
by a sign (as it is allowed in set theory), you can instantly state here, that
this can not be possible in every case.
Especially operators as introduced under 2.1.3.2.1., can not be represented by
a sign. They are logical machines, which are to distinguish from others only
because of the significance of arguments and results - in fact because of
nothing.
There is no doubt, that you can make a count of places in a sign out of all
possible arguments and by them effected settings in a logical machine and by
this you can completely represent the efficacy of the machine. But then you
will have to define regulations depending on the sequence of the settings. This
is not at all trivial, if operators are to represent. Even the representation
of simple logical machines will make too much places in a sign needful.
Apart the fact, that on this way an elegant notation, as known and used in set
theory, is not to get, you can see too, that negations can not be used with
the common thoughtlessness to make something be contrary to an other thing.
It is evident, that a logical machine can not be negated. The here made notion
of negation, found already considering switchers, remains reliable considering
other logical machines. You obviously can not distinguish a true machine from a
single false one, but only from lots of others, which then are not an element,
but a set. If and how such sets can be an element anyway, is questionable.
I next discuss examples, where this is impossible.
Thus making logical machines be elements of sets will be an exception, while
negating such elements or sets has to be done due to the here made notion of a
negation - in every case a negated logical machine will be insignificant and be
no argument for anything.
Some other well known sets can be already considered here:
A peculiar set, even marked using a special expression (the overlay of the
signs '=' and '/'), is the 'empty set'. This set is defined as a set containing
no elements and being 'empty' in this respect. Obvious such a quantity can't
be represented by inverters. Adresses without entries were to make, which
indeed are no adresses.
So there is the question, how needful it is to define nothing to be something.
Already in set theory, such an empty set is not really a set, because the
elements in such a set need to be distinguishable. But nothing is hardly to
distinguish from nothing. Such a set is only thinkable including only a single
element and thus according to normal usage of language isn't a set, but any
thing, which should be no thing.
It is the equation mark, not relinquished in the set theory, which does not
allow to relinquish an empty set. The equation mark forces the usage of sizes
in equations, which are assigned to the same category to be operable. This
means, that sets are to result to a set and an empty set, if there is no
element in the resulted set.
As said, there is no equation mark available in the inverterlogic.
Thus the definition of an empty set is not only impossible but superfluous too.
For this reason too, I assigned the notion of a 'quantity' under 1.2. to the
pleasure of an observer. He may see an empty set too, where only a result at an
exit is in fact. This is making significance as already considered. It is done
a posteriori and does not force the invention of something, which shall be
nothing. Finally there is to say, that the empty set is not a result of
anything in set theory, but is defined as axiom basing the set theory. The
reason is too, to get the number 0, which is not treated to be a natural
number.
Also those sets, which include themselves as an element, can be already
considered here, although there is a connexion needed, which is introduced and
considered not till 2.2.2.
A quantity (or set) including itself looks (shortest) like this on principle:
element1---->>O
elementx---->>O
o---->>O-o-set of elements 1...x and set itself
o--------o
At the lower end there is to see an even series as a part of an ANDing edge,
which makes the set be an element of the same set.
This connexion is indeed logical, but can be shortened, because there is easily
to see, that this additional element is completely reasoned by the other
elements, while it does not reason anything by itself. The result is ever the
same, if that element exists or not.
Anyway this has to be considered in detail, because more than one mathematician
was very engaged in answering the question, if a set can be or is allowed to be
an element of itself, and which consequences are to see.
Here you can see, that the asssignment is logical, but with the peculiar
consequence, that the one additional entry makes an infinite amount of sets be
one element. There is indeed not only the set of elements 1...x, but the set
extended by the set as an additional element too and as well the set, extended
by this element and so on...
Thus the count of sets increases infinite but includes ever the same set of one
more element than the elements 1...x, while this element is irrelevant in
every case.
You can similarly find the irrelevance of sets, which contain all their subsets
as elements.
Empty sets as elements of sets are irrelevant too, while empty sets in fact
are not logical as well as "infinite sets" including infinite counts of
elements.
EXPLANATION:
Under 1.2. I intentionally related the notion of 'quantity' (='set') to the
common use of language and the pleasure of any observer to distinguish elements
and to make a set mean something.
Now there can be stated, that this pleasure has bounds.
You can not make every object be an element in any set, not every connexion of
sets can be relevant, not every significance can be related to a set.
In particuliar negations of sets or elements can be simply irrelevant, as I
demonstrated in the example of a set, which includes itself as an element.
Such sets can be treated to be the negation of sets not including themselves
and to be useful for further conclusions (i.e. in Russel's antinomy).
Cantor indeed also based his set theory on the definition of set, due to use of
language, but did not limit his pleasure, because the idea was too fascinating
to base the whole mathematics on a simple notion due to the use of language.
As here the explications of the inverter-axiom are of interest, the remarks
related to the set theory of Cantor are limited to the most important. In fact
there are a lot of examples and consideration needed to demonstrate all
implications of facts, stated in inverterlogic. As I did not demonstrate till
now, how at least numbers can be operated using relations, there is a lack of
needed arguments at this step of consideration.
2.1.3.1. EQUIVALENCE
Not only then, if we want to operate quantities, but in the main, if we want to
operate numbers, we have to distinguish more than one form of equations, all of
them expressed with the same sign '=' between two terms.
There are signs in use too to express similarity, meaning that the signs at
both sides shall mean the same in some respect.
The following forms are to distinguish:
1) Assignments of values like a=3 or in general y=x
2) Connexion of argument, operation and result like r=2+3 or in general y=a*x
3) Assertion of equality like a+a=2*a (always generalized)
In the inverterlogic these forms look like that:
Depending on 1):
Variables are overwritten in every case and are not "performed".
This is given by the inverter-axiom. There is no entry existing without a value
at it and because of that, there is only one setting in every relation.
Certain different values are assigned by an origin or a sign at the entries of
a relation at the right hand side of those values. The relation becomes a
function, if an other relation at the entries results values - described next.
I demonstrated already, how such assignments are to express, if elements are to
assign to quantities (or sets), while then is not the sign '=', but a lower
case epsilon in use.
Depending on 2):
While the expressions 3+3=r and r=2+3 are commonly used as synonym, in the
inverterlogic, this is excluded by the efficacy, given by the inverter-axiom,
which takes only one direction: The result follows the operation, which follows
the arguments. In 1.1. there is defined to show the result at the right hand
side. Opposite to this in common representation using digits and symbols, the
result is at the left hand side.
Thus if 'r' represents a result, then the form r=2+3 ist conveniant.
2+3=r instead is an other relation - in this example then 2+3 is defined to be
r, which is an assignment.
This kind of representation is also used in computer-languages, already stated
to be important.
Depending on 3):
This form of equations are commonly used to proove evidence by transforming the
part at the right hand side. Then relations to things outside the equation are
to consider. As already demonstrated under 3.1.2., there is no sign '='
available in the inverterlogic. It is not desireable too, because the needed
transformations can be done at the right hand side of the equation without any
connexion to the left hand side.
The "transformation" is done only by using shortening-, extending- or
converting-rules and nothing else. Finally a simple playing with all possible
settings using all possible arguments is the criterion for equality, if new
rules were to find.
Thus in the inverterlogic there will be a result of such equations, which is
one logical value H or L and 'tertium non datur' - very simple.
The truth is not available by doing this and considering any values, but to
find in the space of significance (a posteriori).
In example, there are two statements 'the sky is green' and 'the sky is red',
which are both false, if there is nice weather by day. Truth can't be found
without a relation to our eyesight and feeling of colours. Even a technical
splitted spectrum does not lead to truth without the eyesight of an observer.
So this is the natural limitation of every 'propositional logic'.
If an equation is to translate to a relation, first of all a changed direction
is to notice for consideration.
If the sign '=' is used to represent a relation, the arguments commonly at the
right hand side of the representative then are positioned at left hand side of
the relation and must not be changed.
Those algorithms, which work by "bringing something to the other side", need to
be made in an entire different manner.
As already demonstrated under 2.1.3. you can result equality by ANDing at edges
with even entries, but only the equality of values H. This is hardly the sense
of an equation.
Of course adresses meaning equality can follow any relations at pleasure. Thus
terms commonly positioned at the opposite sides of an equation mark, are to
translate to relations parallel at entries of an adress. Then something could
be "brought to the other side" too.
But those transformations, commonly made to proove evidence, are nothing else
than usage of shortening-, extending- or converting-rules.
If two terms are related to each other to be similar, then the situation is
different in such respect, that everything, which shall be not equal, needs to
be deleted in the relation. Either a priori or by ORing.
This is the effect of the statements about significance and insignificance.
Finally equality or similarity can be questioned or given in such a way, that
there is no common formula suited to express it.
I used such uncommon relations already to proove the evidence of variants.
I found rules in such ways.
Till now I demonstrated rather banal and simply intelligible cases. Such cases
need not to be expect everywhere.
But I can state already here, that different relations can be equal in respect
to arguments and results, but not in every case. Thus prooving evidence has to
contain too the point of view while treating something to be equal. This will
be very important in next considerations, where time or real situations in
electronical machines are to notice.
2.1.3.2. NUMBERSYSTEMS
I made the notion of numbers in 1.2.2. starting at possibilities of settings in
fields. There was no need to define operators before there is defined, what
there shall be operated. Wether a division is to define to derive 'natural
numbers' from splitting to prime numbers, nor a number =1 and a quasi-addition
is to define for the same purpose.
Both ways to define numbers include limitations of the notion of numbers in
respect to the 0, which shall be no natural number (following Peano), or in
respect to the 1, which shall not be treated as a prime number. Finally there
is no end of such natural numbers to see, because 'elements' are considered,
which can be only arbitrarily limited to any count, needing more definitions.
Besides this Peano needed natural numbers already being created to be able to
find a 'next number' in that heap.
On the other hand all this is changed, if you start at the possibilities of
settings, but nothing vanished.
I will demonstrate here, how the same 'elements', the inverters, are to use to
make not only the numbers, but also the operators and the rest of things in
mathematics - without any further definitions, which can not be used without
a proof of evidence.
Logical relations are evident only because of the inverter-axiom and there is
no need for a proof of evidence at any step. Of course they need to be given,
but then they are out of doubt and even no nonsense, if they are not related to
any purpose.
More concrete, there is to say, that you can divide a 0, you can treat a 1 to
be a prime number and can not have an undefined infinity, which has to be
countable because of the notion of possibilities, which can be noticed and thus
can be counted too.
By this every haunting between the numbers or at limits is excluded.
ERGO:
The notion of possibility, made under 1.2. is related to things, that may be.
In the inverterlogic only things may be, which are effected by connected
inverters. Inverterlogic is completely derived from possibilities to connect
inverters and the thus given values. As already demonstrated, these values can
get significance, but not in every case. Finally there are shortenings to find,
which make evident, that not every possible relation defines a peculiar
efficacy, which has to be distinguished from every other one.
The thus possibly existing things are most interesting in respect to the
significance of numbers. That is why I mention the rule here, which in fact
depends not only on that things, which are considered already, but depends on
the whole inverterlogic.
Every step up to here and every further step will demonstrate, that a single
inverter is enough to reason a difference.
RULE:
Every amount of possibilites is defined by a count of inverters and therefore
is complete, finite and countable in every case.
EXPLANATION:
Thus every quantity of numbers as well as of any other significance is
dependent on a given relation. There is no possibility for an infinite (or even
greater) quantity.
The count of possible significance is complete in every case due to the count
of connected inverters, because significance is caused by values, which can not
create inverters. There will also no contradiction occur in possible recursions
which are to consider later. Then 'virtual' inverters can be created, but are
in fact a sort of carry. The prototype of making carry ist demonstrated next
in respect to numbers.
As numbers are a significance of the values of the inverter and a smallest
number is given bei all places =L, which is interpreted as =0, an operator,
which does not contain the interpretation, but results only arguments H,L, can
be prevented to operate the 0 only using a further significance of 0.
But I can appease doubts noting, that of course relations can be made, which
exclude the division by 0 and include possibilities at any pleasure. Also the
statement, that the 1 shall be a prime number, is not as severe as it seems to
to be, because prime numbers are already defined to be numbers, which can only
be divided by 1 and themselves, which is =1 in this case.
An infinity expanding anywhere is only of interest, if you want to see there a
home of any gods. Infinitesimal steps are not affected by lacking infinity, but
on the contrary will be completely reliable. I will demonstrate, that
the inverterlogic enables a more precise consideration of the borders of any
given repertoire for an estimation, where a next infinitesimal step may go to.
I will start considering relations, which effect numbers by the introduced
numbers.
This is arithmetic - but not quite familiar.
I will start with those numbers, which I introduced under 1.2.2. and which
correspond to the known dual digits. They appeared very striking and simple.
I mentioned already, that the values 0 and 1 are not really numbers but digits
with corresponding systems, because 0 and 1 are a significance of the values H
and L in fact. It is an exception, if such a digit system corresponds to the
here defined numbers so well, that no signs as introduced under 1.2.2. are
needed to make identity.
Because of this I will use known expressions for better understanding, but will
finally extend these expressions due to the possibilities available in
relations between numbers.
2.1.3.2.1. OPERATORS
An operator in the inverterlogic connects unequivocal a defined count of
entries with a defined count of exits in that way, that a preceeding setting
never touches the current setting.
NOTION: 'operator', 'operation'
...is a state machine, where values at entries are defined places of numbers,
which are resulted as values in certain places of numbers.
An operation is the efficacy of an operator.
EXPLANATION:
This notion sorts out certain logical machines using new names for those cases,
where arguments and results shall become numbers, and therefore excludes
elementary connexions. Those are no operators.
While numbers are reasoned using elementary connexions, operating of numbers is
reasoned by logical machines. Only this way enables to finally create numbers
using logical machines. Only then you can be shure, that the result of a
certain logical machine is really a number, because numbers are already
existing.
This should be accepted for the sake of clearness.
As operators shall effect results significant as numbers in every case, they
are to distinguish from state machines, which can change efficacy and because
of this can effect results, which have to be significant in more than one way.
2.1.3.2.1.1. INKREMENT AND DEKREMENT
If I intend to make the numbers be results of logical machines, the first step
is to transform the introduced rules of design to something, which I will now
consider as 'making carry' and then generalize. I therefore will make relations
containing at least one entry at the least significant place and at least one
exit at the most significant place for a special argument, normally called
'carry'. In this way, the arbitrary validation 'greater' and 'smaller' is
transformed. The step from one number to a next one will be expressed as usual.
NOTIONS: 'incrementing', 'decrementing'
The step from one number to the next greater one is incrementing, while the
step to the next smaller one is decrementing.
EXPLANATION:
So I do not form an idea of an element =1, but take the one inverter as a
measure, which makes the difference between two adresses in a complete quantity
of adresses. So incrementing or decrementing effects results, which built a
complete number-quantity. There are ever different results effected by these
operators, using different arguments, if cases are ignored, which are caused by
the finity of places (...will be considered later).
NOTIONS: 'carry', 'carry-relation'
A carry is an argument at one or more entries, by which efficacy in the width
of a relation is done.
The connexions, which enable this, are the carry-relation. This is
characteristic for the usage of numbers, is implied by validation and is part
of every operator.
EXPLANATION:
Effecting carries is not adding or subtracting of parts of results as usual,
but seen as a part of an operator.
You instantly can see too, that the lots of operators for the lots of different
number-systems, which are created by changing validities, differ only in
respect to carry-relation.
Already said is, that numbers are only one of much more significances at
pleasure. So you can easily fancy, how making carries can be generalized as a
part of logical machines, which do not effect results with the significance of
numbers.
I indroduce now in example the operator depending on that number-system, which
is the dual-digits-system, mentioned under 1.2.2.
This operator is outstanding simple.
Because of this, we start using those digits, which are defined as significance
of the values H and L: H=1 und L=0
In a first attempt, I start at the possibilities for arguments and results in
one place. There are four possibilities to set arguments in two places resulted
in one one place, which can be seen as adresses:
adresses: significance: places of result / carry
carry L----->O--H------->O
argument L-->O |
|
carry H---->>O--H---->O->O--result
argument L-->O | |
| |
carry L----->O--H---->O |
argument H->>O |
|
carry H---->>O--H------->O
argument H->>O--------------carry
This obvious not very elegant formula demonstrates how to make an operator
on principle out of a connexion of adresses.
Next I introduce the optimized operator without a special derivation, which
operates every sequence of digits in a given count of places, so that the next
greater number is resulted:
argument: result:
1--------------o------>O
1st place of number---X-o---->O-->O--1st place of next greater number
| | |
| o--->>O-->O
o----->>O
|
carry to 2nd place: o-------o
|
o------>O
2nd place of number---X-o---->O-->O--2nd place of next greater number
| | |
| o--->>O-->O
o----->>O------carry to 3rd place
Here the increment =1 due to H is used as argument at the carry-entry of the
1st place. Of course this operator for incrementing can be made for much more
places of a next greater dual digit, but is shown with only two places.
You can see here too, what you saw already considering numbers: The quantity of
possible numbers in the given count of places will be repeated after reaching
the greatest number without a carry to the least significant place.
You can easily state too, that the quantity of numbers, resulted by an
incrementing, contains in every case a smallest number, which is not =1, but =0
Thus, if you like to treat this numbers to be 'natural' ones, you will have to
forget the idea, that the 0 is no natural number and that the count of natural
numbers is infinite.
Besides least and most significant places, there is to state:
This operator consists of comparators connected to each two others in more and
less significant places. But depending on the lines for carries, there are
switchers connected.
There is demonstrated too, that there exists more than one operator making the
same operation in the same numbersystem.
The numbers created by incrementing should be creatable by decrementing too.
At the first sight, the same operators seem not to enable this.
But the next smaller number is easily imaginable without a picture made by
connecting an inverter at each place for arguments and results.
The inversion then changes the greatest number to the smallest, an argument,
which effects the greatest number -1 by incrementing and inverting the result.
Then the carry makes the results smaller than the actual arguments.
But a next consideration is needed too to see, that incrementing is in essence
the same as decrementing:
If the operators are connected to others in such a way, that the results at the
one become arguments at the next, then the first shortening-rule allows to
shorten the two inverters between exits and next entries. Then the relation for
drecrementing differs only in respect to the inverters at the first entries and
the last exits. For every case is demonstrated by this, that different
operations (incrementing, decrementing) are represented by the same settings
in the same operators, thus representing the same numbers too.
EXPLANATION:
This algorithm is well known. The inverted result is in use as
"one's-complement".
It can be much more difficult.
In example the favourite decimal-digit system makes the need of 4 places to
adress the significance of one decimal-digit.
Not every setting in those 4 places is used, because 16 possibilities are
available, but only 10 are needed. Therefore 6 possibilities need to be
excluded and the carry needs to be switched due to a result. But the seemingly
simple counting of fingers is much more complicated in respect to the logic in
the nervous system...
The example of the decimal-digit system demonstrates, that the next greater
number has to be made very differently due to certain digits. Expecially the
decimal-digit system demonstrates, that one carry at a next place may be not
enough. The problems by changing dual-digits to decimal-digits and vice versa
are well known.
2.1.3.2.1.1.1. NUMBER-ATTRIBUTES
How strange the notion of numbers is, derived from elementary connexions, is to
see already facing those numbers, which are known as 'negative numbers'. Those
numbers should be resulted, if any number is decremented till the number =0 is
to decrement.
I prefered this curious formulation, because this number depends on the count
of places, which are =0, and because of no place for a minus sign in the shown
relations.
There was to see instead considering those numbers created due to rules of
design, that proceeding in the field to the next greater or smaller number
leads to the smallest after the greatest number, defined by the count of places
and vice versa. This is independant of any connection besides the parallels.
This characteristic is not changed, if a relation replaces an probing observer,
because that relation is derived from the rule of design.
ERGO:
Obvious the positive numbers can be distinguished from the negative ones only
then, if not only the iteration of incrementing or decrementing is noticed, but
an arbitrary decision about the number itself.
This causes the need to assign the significance to a number to be positive or
negative. This can't be done without further notions.
RULE:
The negative numbers are the same as the positive ones. The significance
'negative' has to be assigned by a relation, which is not part of an operator.
EXPLANATION:
This is the common way, if numbers are to calculate using computers. Then the
significance 'negative' is the value of the 'signbit', which is at the most
significant place, where the carry of the next less significant place appears.
Thus the count of possible numbers in a given count of places is halved. This
is not needed, if any relation parallel to the operator makes the significance
'negative' caused by the most significant carry.
I started deriving of numbers with the assumption, that it could be desirable
to create infinite quantities of numbers. Because of this (and only because of
this) I went on to make rules of design. Now there is to see how arbitrary that
was and that the initial view of not connected inverters to be not existant
was not to give up.
Thus logic can not include infinity. In every case there are only countable
quantities of significances to see, given by countable quantities of connected
inverters, while the quantities nevertheless can be immense at pleasure.
You obvious can't leave an intervall of numbers by using operators, if you do
not replace the carries at the limits of a numbersystem by other significance
making something else out of a carry.
But by this combining an operator regular out of a certain relation for each
place is disturbed.
And finally there is to state, that the negative numbers only can appear
because of not an infinite count of numbers in a numbersystem, but a limit at
a most significant number. This validation can exist at infinity only then,
when a second assumption is used to make the count of inverters, which invert
arguments and results, equal to that infinity. Then infinities needed to be
countable, but are not per definitionem.
As the significance 'negative' can not be a part of an operator, but is a next
quality of numbers, a notion for such a quality is to make:
NOTION: 'number-attribute'
...is a significance of numbers defining to deal with.
The number-attribute is not a part of an operator.
2.1.3.2.2. ADDITION AND SUBTRACTION
As now the smallest step from one number to the next smaller or greater number
is known and thus a numbersystem can be operated, there is to consider how to
do other steps between two numbers. For the first the relation between two
numbers shall be of interest, which are added or subtracted. The results are
obvious not neighbouring in the sequence of numbers and there is not only one
argument and a carry to operate.
NOTIONS: 'add', 'addition', 'augend', 'addend', 'sum'
An addition is a count of incrementings, resulted by an operator named
'adding' as a sum. Then the one argument is the augend, while the other argumen
is the addend. A carry may be a third argument.
EXPLANATION:
This is the common notion, but derived from the notion of incrementing.
While commonly an increment is treated to be a certain addend, in inverterlogic
there exists an own operator for incrementing, which is certainly a shortening
of addition. You can demonstrate this by considering the adresses at one place
in the result.
I will show now addition in a way to make it easy to see additional parts in
the optimized operator opposite to incrementing.
I do not explain in detail the starting point, which is a table, where the
values at here three entries are assigned to values at here two exits, one of
them used for making carry.
I show only one place of the operator:
entries. exits:
1st place carry---o------>O-->O--------o---->>O>-----2nd place carry
1st place augend--X-o---->O | | o--->O
| | | | |
o-X---->O-->O | |
1st place addend--X-X-o-->O | | |
| | | | | |
| o-X-->O-->O | |
| | o-->O | |
| | | | |
o-X-X->>O------------X-o-->>O>-----1st place sum
| o-X->>O o->>O->O
| | o->>O |
| | | |
o-X-X-->O--------------->O
o-X-->O
o-->O
EXPLANATION:
There are not only more than one operators for incrementing but for adding too,
especially one, which is deeper than the here showed one and consists of
comparators.
There is the possibility too to connect operators for incrementing in such a
way, that the addend is not an argument at the entries of an addition, but an
argument at the entries of a relation, where due to the addend series of
incrementings are switched on.
The subtraction can be done using the already mentioned one's complement. But
commonly used is the 'two's complement', which is an incremented one's
complement.
There has to be noticed too the asymetry of the arguments, which can not be
changed opposite to arguments to add. This makes the need too, to use the
number-attribute 'negative' as significance apart from the significance of
numbers.
NOTION: 'subtract', 'subtraction', 'minuend', 'subtrahend', 'difference'
A subtraction is a count of decrementings, resulted by an operator named
'subtracting' as a difference. Then that argument, which becomes smaller by
subtracting, is the minuend, while the other argument is the subtrahend.
Other arithmetic operations as multiplying, dividing, power of and root of are
easily to derive from the shown operators for adding. I therefore spare the
detailed demonstration of those operators, which are made due to well known
algorithms. But there are other solutions interesting, which contain other
making of carry and are demonstrated under 2.1.3.2.3.
Here is to consider next, that the numbers built a limited repertoire of values
not extentable using operators, and that therefore already negative numbers are
to result not only in an operator, but using a parallel relation too making the
significance 'negative'. This is needed analogue whenever operations are to do,
which are multiple decrementing or subtracting. This depends on dividing and
making roots. These operations make the need too to make a certain significance
out of the appearance of smallest after greatest numbers and reverse, but using
another number-attribute as 'negative' - point or line.
As in this cases the 0 is causing the significance too, there must not be a
forbidden dividing of 0. At least those places before the point can be =0 in
every place of the dividend und need to be dividable. There can be no exception
seen if these places are the whole dividend or only a part of it in one
relation. The objection, that the result then is undefined infinite, is not
true depending on the here considered numbers containing a greatest number in
every case, which is not infinite.
Similarly to consider are roots of -1, which are known as 'imaginary numbers'.
As only the significance is to change, if negative numbers are to operate
instead of positive ones, roots can be made using the same operators. But the
results with carry in most significant places are to handle different.
2.1.3.2.3. MULTIPLICATION AND DIVISION USING POWER OF 2
In a dual-digit-system as well as in other digit systems you can easily
multiply or divide by the power of the base of the system shifting the digits
in the width. Shifting two places to the left hand side makes in the
dual-digit-system the digits 100 out of the digits 001 representing the
multiplication of a 1 by the power 2 of 2. In the decimal-digit-system the same
shifting represents the well known multiplication of 1 by the power 2 of 10.
As shifting of values H,L in lots of places can be significant not only as dual
digits, I make a more general notion of an operator 'shifting'.
NOTION: 'shifting'
...connects places in an argument to other places in a result without changing
the sequence of values H,L in the width.
EXPLANATION:
This operator is obvious to shorten and superfluous, if it is needed between
parts of relations as operators in a state machine. Then only the validation of
places is important, which is made by connections and significance.
But this way is not available in machines, considered starting under 2.2.3.,
where the significance assigned to places can't be changed by an observer.
This operator connects two arguments by principle. The one will be shifted
while the other one defines the count of places to shift. Besides this there is
to distinguish shifting to left or right hand side and the values, which shall
replace the values shifted out of places with lowest or highest significance.
Finally there is to state, that in every case there will be a carry to notice,
which can contain more than one value H,L. Such differences can not be
transformed to number-attributes, but depend on the operators, each for every
kind of operation.
I show now the operator for shifting 1 to 4 places to the left hand side, which
here is downward, and a shifted argument in 2 places, while the shifted in
values will be =L. Shifting 0 places isn't showed.
arguments for shifting: result of shifting:
L------------------1st place
V1-->>O-----------o--->>O----------------------------------2nd place
V2--->O | o->>O
o-X-------->>O
| o->>O->O->----------------------3rd place
V1--->O-----------o-X->>O--X----->O
V2-->>O | o->>O |
o-X------X->>O
| o->>O->O->----------------------4th place
V1-->>O-----------o-X->>O--X----->O
V2-->>O | o->>O |
o-X------X->>O
| o->>O---------------------------5th place
argument shifting: | |
1st place-----------o |
2nd place------------------o
The places 3,4,5 in the result will be the carry, if the width can not exceed
the width of the argument.
I do not show the needed variations for shifting right or in more places for
the arguments, because they easily can be fancied.
If there is an argument to divide by shifting to the right hand side, making
the carries has to be done in the other direction as results then become
smaller. Then those carries have to get significance as rest, which could be
made to places behind a point, if no other idea is preferred.
2.1.3.2.4. POSSIBLE OPERATORS
After demonstrating operators, which make known arithmetic operations, and
stating already, that the same operation can be made by more than one operator,
there is now to consider the rest of possible operations.
I stated already, that the immense quantity of possible numbersystems can be
made much smaller by making significance, in the most simple case using signs.
Because of this you need to consider only some operators, which are possible in
a numbersystem, where the numbers can be expressed as the well known dual
digits.
Thus I ignore for the first those variants, which differ only in connecting
carries. Those operators are in fact different, but only in such a trivial way,
that they can be made equal only using signs.
But there are obvious deeper relations, which are not so trivial similar.
These will be relations, where carries are not made in the already demonstrated
way using a carry in one place at each place of a number and connecting it only
to higher significant places.
So there are to consider operators, where a carry is effected in more than one
place. I start with an operator for multiplying, consisting not of serial
connected operators for adding. For the sake of easy intelligibility I reduce
the relation, so that there are three places for each argument and six places
for the result.
The known algorithm for multiplying in the dual-digit-system makes the value
in each place be a criterion, if the multiplicand shifted due to validity of a
place has to be added to the product or not. I show this in a example using
dual digits 101. The product of 101*101 can be transformed to adding a sum like
this:
101 1st place of multiplicator =1 -> multiplicand to add
+ 000 2nd place of multiplicator =0 -> multiplicand not existant
+ 101 3rd place of multiplicator =1 -> multiplicand to add
A 6th place is needed because of a possible carry.
The relations needed to connect each place in a multiplicand with each place in
a multiplicator look like this:
1st place of multiplicand----------->>O----------1st place of addend
2nd place of multiplicand-------------X->>O------2nd place of addend
3rd place of multiplicand-------------X---X->>O--3rd place of addend
| | |
x place of multiplicator----------o->>O | |
o----->>O |
o--------->>O
Due to the count of places in the multiplicator the addends need to be shifted
by the right count of places before adding them to the product (a sum). This
means to shift the addend by the count x for the place x. Then we get 3 addends
in this example, which are to connect to the places R1-R6 in the six places of
the result.
These addends are now named A,B,C, while a postfix names the place. Then i.e.
A1 is the least significant (first) place in the last significant addend. Now I
do not intend to make sums out of pairs of addends, but will show how to make
carries in more than one place, while additionally shifting the addends. The
solution starts by connecting adresses too aiming to minimal depth. A carry is
named Y and the postfix names the source place and the connected destination
place - i.e. Y23 then is the carry from place 2 connected to place 3.
1st place / unchanged 1st place is 1st place in addend
A1------------------------------R1
2nd place / carry to 3rd place possible / 2 adresses
A2-o-->O->----------------------R2
B1-Xo->O
|o->>O
o-->>O-----------------------š23
3rd place / carry to 2 greater places possible / 15 adresses
Y23--->>O---->O->---------------R3
A3----->O |
B2----->O |
C1----->O |
|
Y23---->O---->O
A3---->>O |
B2----->O |
C1----->O |
|
Y23--->>O-----X--->O->----------Y34
A3---->>O | |
B2----->O | |
C1----->O | |
| |
Y23---->O---->O |
A3----->O | |
B2---->>O | |
C1----->O | |
| |
Y23--->>O-----X--->O
A3----->O | |
B2---->>O | |
C1----->O | |
| |
Y23---->O-----X--->O
A3---->>O | |
B2---->>O | |
C1----->O | |
| |
Y23--->>O---->O |
A3---->>O-----X--->O
B2---->>O | |
C1----->O | |
| |
Y23---->O---->O |
A3----->O | |
B2----->O | |
C1---->>O | |
| |
Y23--->>O-----X--->O
A3----->O | |
B2----->O | |
C1---->>O | |
| |
Y23---->O-----X--->O
A3---->>O | |
B2----->O | |
C1---->>O | |
| |
Y23--->>O---->O |
A3---->>O-----X--->O
B2----->O | |
C1---->>O | |
| |
Y23---->O-----X--->O
A3----->O | |
B2---->>O | |
C1---->>O | |
| |
Y23--->>O---->O |
A3----->O-----X--->O
B2---->>O | |
C1---->>O | |
| |
Y23---->O---->O |
A3---->>O--------->O
B2---->>O
C1---->>O
Y23--->>O-----------------------Y35
A3---->>O
B2---->>O
C1---->>O
4th place / carry to to greater places possible / 7 adresses
Y34--->>O---->O->---------------R4
B3----->O |
C2----->O |
|
Y34---->O---->O
B3---->>O |
C2----->O |
|
Y34--->>O-----X--->O->----------Y45
B3---->>O | |
C2----->O | |
| |
Y34---->O---->O |
B3----->O | |
C2---->>O | |
| |
Y34--->>O-----X--->O
B3----->O | |
C2---->>O | |
| |
Y34---->O-----X--->O
B3---->>O | |
C2---->>O | |
| |
y34--->>O---->O |
B3---->>O--------->O
C2---->>O
5th place / carry to 1 greater place possible / 7 adresses
Y35--->>O---->O->---------------R5
Y45---->O |
C3----->O |
|
Y35---->O---->O
Y45--->>O |
C3----->O |
|
Y35--->>O-----X--->O->----------R6
Y45--->>O | |
C3----->O | |
| |
Y35---->O---->O |
Y45---->O | |
C3---->>O | |
| |
Y35--->>O-----X--->O
Y45---->O | |
C3---->>O | |
| |
Y35---->O-----X--->O
Y45--->>O | |
C3---->>O | |
| |
Y35--->>O---->O |
Y45--->>O--------->O
C3---->>O
Some possible shortening in connecting carries is not noticed...
As a multiplication shall be effected, multiplicand and multiplicator can be
exchanged. Thus different pairs of operands (i.e. 3*1 or 1*3) can effect the
same result. This is obvious not possible in every operator. If a division is
to do in a relation, where operands can be similarly connected with making
carries, then the operands can not be exchanged. Besides that other kinds of
significance are to notice - a point and the places behind or any other sheme
depending on the rest, which is a carry to below the 1st place in this case and
caused by making carries in direction to lower significant places.
You can see too, that such relations will not get deeper, if the count of
places gets greater. But the width will be extended, if the solution is done by
connecting adresses - this is possible in every case, because the operations
depend on complete quantities of adresses.
Besides that, I demonstrated how to shorten the operator shifting, which is
needed, if the known algorithm is used.
You can easily fancy variants, where not finally a sum or difference is
resulted.
2.1.3.2.5. POSSIBLE NUMBER-ATTRIBUTES
We could see, that the number-attribute 'negative' is dependant on the carry in
the most significant place. So you can conclude, that a carry, which can be
defined in more than one place too, is a criterion in every case for changing
to a range with different significance. A carry in least or most significant
places is in fact a criterion in every case, that the result does not fit into
a given count of places with given validity. This case is to notice in every
case, because an infinite count of places is not available and every operator
contains making carries.
I demonstrated already under 2.1.3.2.3., how an operator for shifting can
replace the not available point. So you can get a number expressing the
validity of places, if you can not manipulate the position of lines. This is
well known as 'floating point calculation' and shall not be considered here in
detail, because there is not only a single number-system to consider, but lots
of operators at pleasure too.
You can not only move numbers to the range of effectable numbers by shifting,
which are smaller than 1, but too great numbers too, which thus are always
numbers in a given count of places, where always complete quantities of numbers
are possible, which indeed are to split due to making significance in the
operation to do in values of numbers and number-attributes, which can rule the
validity of places too.
I did not direct making significance for number-attributes be a part of the
notion of operators, because the number-attribute is not conditioned by a
number, but a carry. Even if the number-attribute itself can be operated like a
number (i.e. as a power of a number), then the needed operator is a part of
making significance, which can be done at pleasure, while the results of
operators are always numbers and nothing else.
RULE:
Every operation results at least two different quantities of values H,L ,which
are as numbers to distinguish from number-attributes, which are effected by a
carry in at least one place.
EXPLANATION:
For the first there is to say, that operators are indeed logical machines,
where efficacy can't be changed by arguments, but by connecting them to
relations making significance as number-attribute, finally a state machine is
created. Else you even could not get using subtraction from positive to
negative numbers.
As the quantity of operators can be vast at pleasure, the quantity of
number-attributes can be vast at pleasure too, which always also can condition
the validity of places too.
Thus ideas depending on quantities (=sets) of numbers become extremely trivial!
In every case there exists a fixed, countable quantity of places, where values
H,L get one of two significances, given by a relation. In every case there
exists a limited count of possible settings for both significances.
RULE:
In every case numbers as well as number-attributes are a finite quantity of
possibilities for settings in a certain count of places.
Also the number-attributes are always related to a fixed count of places in
numbers.
2.1.3.2.6. POSSIBLE QUANTITIES OF NUMBERS
While I considered till now numbers and operators connecting them, I will now
start to consider those numbers, which appear as results and can get different
number-attributes by carries too.
It might be of interest to get new statements by treating arguments and results
being elements in a single quantity.
This is not possible in the common way in respect to the here considered
numbers, because they exist on principle in a finite count of places, which can
not be increased by operations.
Because of this not only places in results can lack, if results are greater
numbers than the greatest number, which an operator can result. Places can also
lack, if there are i.e. remainders during divisions effected, which will become
numbers "between" numbers by completing the calculation, meaning numbers
between 1 an 0, which will become addends of the final result.
Conditioned by the finity of places for results, there are to notice false
results on principle, whenever operands can be defined in the same count of
places.
You can see this already using the familiar decimal digit system while defining
only one place for the result of multiplication. Then the same result =6 will
be effected, if you multiply 2*3 or 4*4 a.s.o...
RULE:
A complete quantity of numbers never can contain every possible operand and
every result too. In every case a significance has to be assigned to carries in
least or most significant places. In every case, there are faked results
possible, because of lacking places outside the range of values.
But the value, which appears in only one place as a carry using incrementing or
decrementing, is a combined one using other operators. Then certain numbers can
be a remainder, a carry or an incomplete result appears.
Because of this, every operation on numbers has to be done taking care on the
relation between operands and results.
But in every case the results are possibilities of settings in a defined count
of places and thus are numbers, effected by the operator.
These numbers do not build a complete quantity of numbers, even if the count
of places is defined in a way, so that only complete results can be effected.
RULE:
If other operators than incrementing or decrementing are used, and if every
operand is greater than 1, then there are to recognize in every case two
incomplete quantities of numbers, which are united a complete quantity of
numbers.
NOTION: 'complemantary numbers'
...is the incomplete quantity of numbers, which are no results.
The complementary numbers are in fact numbers, because they are included in the
possible settings in places of results and could be effected by incrementing.
This becomes important in case of numbers, which are resulted by certain
operators, which do not increment. An example are rational numbers, which are
defined as fractions and because of this are results of dividers.
As said already, a result is a number with fitting number-attribute in every
case. The number-attribute can include a power too, which conditions, where to
set the point, if there were a point in inverterlogic.
But as the number-attribute is not the number, you can recognize anyway, that
the quantity of results is smaller than the quantity of possible numbers in a
given count of places for results, independant of any number-attribute. And the
quantity of complete results is smaller too than possible operands in the same
count of places can condition.
While infinity is lacking in inverterlogic, you nevertheless can use the notion
of 'ad limes infinitum'. I replaced this notion here by 'at pleasure' in every
case, because I decided already under 1.1. to distinguish well efficacy from
observation. An observer can imagine places at pleasure, while the relation
das not exist.
Such an observer can imagine, facing the regularity of a division and
calculating of power, that remainders get smaller by increasing the count of
places, but occassionally do not vanish - appear periodically or not. He can
state nevertheless, that there is always an exact equal border of a relation,
where carries condition results to be remainders and negative power to
increase or not. So he can be convinced, that every result is a possibility
included in a finite, countable and complete quantity of numbers. If he looks
at the always in the same manner connected places, where carries are made, he
can see, that the value at a next place for results is indeed conditioned, but
if the place does not exist, the value there is irrelevant in relation to
countability, which is also existing in relation to the steps of calculation
till reaching the lowest validated place.
Thus a 'finite, periodical fraction', which is a result with a width at
pleasure is calculatable opposite to an 'infinite, periodical fraction',
though both fractions will be the same number in all places, if they are in
fact calculated.
ERGO:
While places before the point increase in the direction of greater values, the
places behind the point increase in the direction of smaller ones. Because of
this, there is always a finite quantity of places, where numbers appear, which
may include a point in any place, expressed by a power, which then is an
argument for shifting.
The already under 2.1.3.2.5. stated rule of finity of every quantity of numbers
now can be extended depending on countability:
RULE:
Every quantity (='set') of numbers is a finite count of these numbers.
By this the count of numbers in any operation using any number-attribute is
indeed great at pleasure, but incomplete results are not excluded. Anyway the
count of results can be derived from the count of operands in every case as
well as the relation of places, needed for operands and complete results
An infinitesimal consideration leads to the statement, that possible incomplete
results appear in a region of numbers, which is not needed for the purpose of
an operation.
We need a next notion for a meaning related to purpose, which is different to
significance in inverterlogic, based on relations and the value H.
NOTIONS: 'relevance', 'irrelevance'
Connected inverters or settings are irrelevant, if they are superfluous in the
eyes of an observer. They are relevant, if not.
EXPLANATION:
I already used this notion in this sense treating on common use of language.
But here not only meanings apart of inverterlogic are to discuss, which make
any connexions appear as superfluous and to shorten, but those values are to
discuss, which should be numbers outside a relation, but can not be.
There is to ask now, how to use the notion of 'calculability', if independant
of the count of places results are to exspect in every case, which can not
appear, if there are not more places defined for results than for operands.
It is evident, that an observer never can get the pleasure of all results in
the same count of places as the operands.
I stated already under 1.2.2. ,that the greatest number is followed by the
smallest one. Now I can complete the statement, stating that also the greatest
results are followed by the smallest ones.
This is in fact the difference between infinity and finity!
As numbers can exist only in places, given in a relation, calculability too is
dependant on a relation. Calculability outside of a relation can not be and
so needs not to be discussed nor regreted.
You can not calculate ad limes infinitum, but only ad limes finitum, inside of
a relation.
RULE:
Imaginable results, which could appear outside of a relation, are irrelevant.
EXPLANATION:
Though these statements are explicated from the inverter-axiom, they depend
anyway on all numbers and operations, which are explicated from Peano's axioms
(the well known arithmetic and number-theory), because the 'natural numbers',
which are the origin of all numbers, are logical as well as all operators for
connecting them. There is no doubt to reason with the fact, that I did only
consider the dual-system, because there is no number-system given by an axiom
and thus it is allowed to use the dual-system to consider the natural numbers.
The inverterlogic does not only demonstrate the possibility of operations,
which are ignored till now, but also allows an advanced view on numbers as
elements of quantities (=sets), numbers, which do not appear without making
carries.
Even using known arithmetic, nobody writes numbers without using a
number-system, which implies the need of making and calculating carries,
remainders and signatures and the validating of places. But there is to notice,
that only the decimal-system was considered, though other number-systems were
well known too. Because of this distinctions were made up as important notions,
which in fact are not as important as used to be. This depends mainly on
everything related to divisibility. Periodical fractions distinguished from not
periodical ones, though periodicity as well as divisibility are only caused by
the used number-system. The decimal faction 0.2 is a periodical dual fraction,
though the result needs to be the same in both cases. But of course any other
prime numbers besides of 5 or 2 can be used as a divider of the base of a
number-system. And in every case there will be numbers, which are not to divide
and to notice as periodical and not periodical fractions. But these are never
caused only by certain arguments!
The number between positive and negative numbers is to fix at pleasure as well
and therefore this border is also not as holy as used to be, but to consider
only dependant on operators and significance. The 0 always can be displaced
('offset') by a certain value, which is to notice only after the end of a
calculation - I will demonstrate under 2.2.3.x, how important this kind of
"relativity" is.
But inverterlogic does not only demonstrate, that all quantities (=sets) of
numbers are in fact one quantity of numbers and that only number-attributes can
make a difference in a certain number-system.
Inverterlogic demonstrates too, that you can not simply make signs meaning
operators as well as signs meaning numbers be combined quantities (=sets).
Numbers are a significance of values H,L - operators are not any significance,
but the efficacy of a significance as results, which is to complete by a
number-attribute.
Here a more precise consideration additionally demonstrated, that in every case
incomplete results are possible too - totally independant of the width and
the manner of making carries. Making carries and only that causes this special
kind of incalculability, which nevertheless makes nothing in the range of given
places being incalculable.
Now the essential difference is to see between the 'natural numbers', as made
as axioms basing the 'Peano-arithmetic', and those numbers, made in the
inverterlogic. Here they appear only as significance of values H,L ,which are
part of connected inverters. There they appear as infinite quantity and part of
anywhere and are to find with the tweezers of Peano's axioms. And there are
additional axioms needed to make true, that the anywhere and the there laying
or standing natural numbers really exist.
Any validation of places, which appears here as not to relinquish and with
great consequences, is not part of the those axioms.
Here numbers exist only in places and therefore no numbers can be sorted
between other numbers, as it is possible in a straight line of numbers.
And while here numbers are represented by logical values, there logical values
are represented by numbers.
I prefer to take it as a question of taste, if you want to think of numbers
there, where nobody can look at, or if you treat only on existing inverters,
which are to think in a quantity at pleasure and ready to mount.
Inverters can be handled as transistors and can be soldered to proove the
evidence of the rules, found in inverterlogic. No computer can be build besides
that rules ( the computer itself is derived from the inverter-axiom under
2.2.3...). So you can see clearly, where something maybe 'incomplete' and
'incalculatable' - and where not, and how relevant that is.
Peculiar quantities are those numbers, which are made up by any negation.
Such numbers always are to derive from complementary quantities of numbers.
Other negations, which depend on certain kinds of results, are to derive from
remainders and carries (i.e.'periodical'). Besides that, always the relation to
a given number-system is to notice too.
Imaginary numbers are opposite to that only to derive from number-attributes
of operands.
I made this consideration also so detailed, because inverterlogic demonstrates
the possibility of lots of others operators, which do not only effect
fractions. In peculiar there are carries imaginable, which are not only made in
one, but in two directions. In that case, the rules may get false too, which
were found here depending on the well known operators. Then operands and
results could be parts of the same quantity of numbers, while every result is
a complete one.
Even more than one place in arguments and results could be the smallest element
of an an operator, so that carries are to make stepping over more neighboured
places to the next input for a carry.
Operators also can be the lots of terms in a sequence or row, while of course
the count of these terms has to be finite.
And of course recursions are possible. But I will consider that only then, when
I considered the dimension of time of the inverter more in detail.
2.2. PHASE MACHINES
While we considered relations till now without the need to consider the nature
of logic and the status of logic in the nature, we next will have to notice,
that the time needed by efficacy is not an ignorable oddity of an inverter,
whose exit is connected to its entry. In fact, this oddity can not be ignored
without making inverterlogic vanish.
At the other hand side inverterlogic is the first logic, which can be seen as a
part of nature without the need of incantation and arrangement. Even if I am
convinced, that logic is a part of nature, if it allows to get technical
solutions or insight in physical matters, I am not pleased to accept this only
because of utility and not derived from an origin.
There was already to state, that relations can be switchable.
Now there is to proove, how deeper relations need to look like, which are not
only to switch from one efficacy to another one, but change the efficacy due to
certain sequences of values at the entries.
For the sake of starting, we need expressions for changing a value and then for
sequences of values:
EXPRESSION: 'flank'
If not a value H or L is to consider for efficacy in a relation, but the change
from one value to the other one, then this change is a flank.
Two flanks are to distinguish:
The flank from H to L is expressed as: H\L
The flank from L to H is expressed as: H/L
EXPRESSION: 'sequence of values'
If sequences of values at entries or exits are to express, then the values are
written in sequence, separated by commas. Those values are ordered due to time
and the first one to appear is written first at left hand side, followed by the
next one.
Sequences of values at exits need to contain as much commas as sequences at
entries of the same relation.
We additionally need a notion of an efficacy, which is not only switchable, but
exists for some certain time.
NOTION: 'state'
A state differs from any other setting in respect to time too, lasting from one
setting to the next one.
If a state depends only on a setting in a part of a relation, then states can
be overlapped in time.
EXPLANATION:
There is to demonstrate next, that states are useful above all for making
significance and thus are the other side of a significance, laying in time.
But I ignored here the purpose of states, because obvious there are states,
mainly significant in that way, that you do not want them, but have to take
care of them.
2.2.1. IMPULSE-GIVER
Let us consider a very simple relation, which is in fact logical, but not at
all useable, if you do not want to see a dimension of time in efficacy and do
not want to distinguish, if a value is stable or just changed. This relation is
very important, if existing as real digital circuit, because it is used to
effect not only two flanks, but make certain times lasting between the flanks.
impulse-giver 1:
L ---->O
o->O---->O
H,H\L,L,L/H --o------->O------- L,H,L,L,L
We can be surprised by the result in this relation, which is L, whenever there
is a H or L or L/H at the lower entry. And there will be only then a H at the
exit resulted, if a need of time in the upper edge and a flank as an else value
are supposed. And this has to be independant of any observer the character of
an inverter.
Only the flank H\L effects a setting including the result H and this lasts
exactly as long, as the need of time in the upper, first edge is supposed.
Such a special impulse-giver shall have a name for further consideration:
EXPRESSION: 'monoflop'
...gives a single change of value
Now we can get other notions too depending on changing values by flanks.
NOTION: 'period'
...is a result, effected only by a certain sequence of arguments and containing
both values of the inverter.
The values are effected in the same sequence in every case, but contain only
two flanks.
As one of the resulted values can last at pleasure, while the other one appears
due to the inverters at the first edge and only for a short time, these
conditions are to notice too.
NOTION: 'response-value', 'pulse'
The one resulted value, which is not changed by even one of the flanks as an
argument, is the response-value, while the other resulted value, effected by a
flank only, is the pulse, which is a complete change of value during a certain
time.
EXPLANATION:
But we can make another statement too, which will finally force us to refine
the already stated rules for shortening and extending.
If we namely suppose a need of time for efficacy of an inverter, then we must
not shorten or extend any more at pleasure. If we extend the odd, lower branch
of the lower entry by only two inverters, then the last edge can not ANDing any
more and result a H. Then the relation is not useful at all and no monoflop any
more (but still logical...).
The new values H\L and L/H are indeed logical, but only reasoned by the need of
time in efficacy.
These two values are not told by the inverter-axiom as well as the two values,
triumphing at edges in logic and anti-logic. They appear as necessary in the
consideration of relations and do not force an extended range of values of the
inverter or a revision of the axiom.
Finally there is to say, that there are other periods effected, if the
inverters in a impulse-giver are replaced by anti-inverters, but not the
flanks. Thus a anti-logic can not only result the same values as the logic,
but the same periods too. Only physical consideration can make a difference
between real inverters and anti-inverters in respect to needed time for the
efficacy.
In this chapter about phase-machines I want to consider conditions, which are
much better to discuss using inverterlogic instead of known algebra, because
the inverter includes a dimension of time and flanks can appear as values. Thus
there is no need to use diagrams of states besides a logic, which is not useful
to express or calculate timing.
By this way we can distinguish state- and phase-machines.
NOTION: 'phase machine'
Phase machines are relations, where settings are conditioned by the need of
time for efficacy. Because of this the needed time in connected branches is to
calculate, whenever a conversion is to do. Then extensions with even series may
be needed.
While the already shown impulse-giver 1 the pulse =H resulted according to a
repose-value =L and a flank H\L, the following relation results the pulse =L
according to a repose-value =H and a flank L/H
impulse-giver 2:
H ---->>O
o->>O>->>O
L,L/H,H,H\L --o------>>O>------ H,L,H,H,H
If the last inverter is removed, then the same result appears as known from the
impulse-giver 1, but effected by the other flank at the entry.
If at impulse-giver 1 an inverter is connected to the exit, then the same
result appears as known from the impulse-giver 2, but effected by the flank H\L
I do not mention every variant, because I only wanted to suggest, that there is
not only a pulse H or L at the exit available, but both flanks H\L or L/H can
effect this. Because of this, there is to distinguish, if a pulse at the entry
effects a similar one at the exit or not.
EXPRESSION: 'rotation'
The rotation of an impulse-giver is right, if the flank L/H effects the period
L,H,L,L,L while the rotation is left, if the flank H\L effects the period
H,L,H,H,H
EXPLANATION:
The meaning of right or left is obvious arbitrarily defined. But it makes sense
considering impulse-givers, because inverters at entries or exits can make
periods at pleasure available. Then the duration of a pulse can be dimensioned
by choosing a certain impulse-giver.
We will find next, that efficacy can include some rotation, which can not be
altered by variants of settings, but only by varying the relation. But then
other expressions will be needed too.
2.2.1.1. ANGLES
It is common to see angles in a period representing a circle.
The whole circle then is the interval H,H\L,L,L/H or L,L/H,H,H\L
This circle indeed can't be divided by dividing an inverter.
To consider next is an odd series, made of inverters, whose efficacy needs time
as now demonstrated.
Probes at every second connexion then do not only reflect H or L and not only
L/H or H\L too, but every part of flanks at pleasure, which spread out as a
wave in the direction of efficacy.
Then a circle divided by three can look like that:
--------------o>o>o>o>o>o>o>o---------------------------
| | | | | | | |
1 5 2 6 3 7 4 8
We probe here at 1=180ø, at 2=120ø, at 3=60ø and at 4=0ø, if a flank L/H is
just completed at 1, while it just starts at 4.
If there where probes at 5,6,7,8 too, then two synchronized divisions of a
half circle could be reflected, which are displaced to each other by 150ø
including the same rotation. The division of the half circle 5,6,7,8 starts
with 180ø, when 1=30ø, shifted in the phase by that.
ERGO:
A complete division of a circle is not done by dividing an inverter, but is due
to the count of inverters in that series, which represent the circle to
divide.
Additionally the circle is conditioned by the supposed need of time for
efficacy, because of course the shown division can only exist, if a period is
done indeed during seven efficacions.
Thus we can see, that a graduation is as arbitrary as the supposed need of time
for efficacy, while using symbols.
Nevertheless we can be shure of the logical existance of angles.
RULE:
The inverter includes the whole circle as well as any part of it in a relation,
if graduation is the significance.
EXPLANATION:
Stating this is the most important step on the way to base geometry on the same
inverter-axiom, which allows to base algebra and arithmetic. Angles are
manifest and logical and therefore can be operated by any relations at
pleasure. Thus they can be matters of algebra and arithmetic without the need
of else axioms or definitions.
But indeed the such based geometry appears strange too:
While the familiar geometry is expressed using a pair of compasses and a ruler,
the inverter-axiom is obvious not built like that, but seems to be a symbol,
which is related to space only by arbitrariness of an observer.
While graduation and thus the expression of angles using a pair of compasses is
well known, this graduation is a problem using inverters, which is caused by
duality of the axiom. Even if the axiom would allow values at pleasure between
H and L, the problem could not be solved. Then similar to the transistor values
needed to be noticed, which are not at all logical ( temperature a.s.o...)
The solution needs to make the values between H and L logical again.
This can be done in principle using an ANDing edge, which is indeed capable of
effecting the relation between at least two angles.
This looks like that:
L/H--o>>o>>o>>>>>>>>>>>>>>>>>>
| | |
o--X--X------------------>>O-1st angle
| o--X------------------>>O
| |
o-----X------------------>>O-2nd angle
o------------------>>O
Here the 1st angle is =H before the 2nd angle. By this way the angles became
logical values. These values can be set in more than one place too, if the
flank L/H is used to effect a field like that, shown under 1.2.2. The here
shown ANDings then need to connect the entries of the field with the wanted
adresses of even numbers.
As 1st and 2nd angles now are logical values, they indeed can be connected at
pleasure. In example, the 1st angle is siginified as smaller by the 2nd angle
being still =L, while the 1st angle is already =H.
But I need to introduce other relations first, which allow to make that
transistory angles stable existant.
Besides angles there is to derive the point from the inverter-axiom, because
only a lot of points enable to make any figure, where angles can occur.
2.2.1.2. POINTS
As points are good for nothing, which are not to distinguish from other points,
there is similar to numbers only an adress suited to represent a point.
Similar to numbers there is a complete quantity of adresses needed to define
every point in a given field. Then a single inverter is the one to distinguish
one point from each other. But it is just as little a point as a one-element.
There is to say about such points:
As an inverter includes efficacy, there is a need of time too. The adresses are
separated in a field by the duration of the efficacy of one inverter. Every
structure given by such adresses therefore is given only after a certain
duration after connecting them to a sign, if the structure is moved. As already
demonstrated under 1.2. values can be shifted in a field by using signs instead
of an origin. This then is a moving of points, not thinkable without a need of
time. Making an image needs time too.
As points as well as angles are manifest by connecting inverters, but in every
case a single inverter can make the difference between two angles or two
points, a such based geometry is quantized.
This may seem far too strange.
So some more is to say to make the inverter in a field appear as ideal point,
suited to base geometry:
While the familiar geometric points per definitionem include nothing, which
enables any act to glue them to a straight line or a plain, the inverter can be
connected.
While due to familiar geometric points there is nothing defined, how to relate
them to the next one, an inverter includes as demonstrated an angle between
entry and exit, thus enabling a relation between neighbouring points, not
reasoned by any interpretation of a draughtsman.
While the familiar geometric points are seen in a room, where infinite lots of
them can be packed in, there are only countable lots of inverters in a
relation.
While the familiar geometric points are supposed without any extension, but
(in fact in contradiction) round in more than one dimension, the inverter needs
not to be completed by any supposition to make it fit for an element in
geometry.
Finally there are lots of suppositions needed in respect to points in the real
world. They can include matter, load a.s.o. making them not at all being points
with no extension.
Opposite to this the inverter includes time, which due to theory of relativity
does not exist without space.
As even the familiar geometric points are not at all as simple as they seem to
be, a geometry based on inverters may enable a true image of matters in space
and additionally matters in time.
NOTION: 'points'
Points are the same as numbers, only to distinguish by making significance.
EXPLANATION:
You can not a priori distinguish points from numbers. Also angles and efficacy
are not a priori to distinguish. In fact geometry using inverters is logical
and not apart from algebra and arithmetic.
The most important difference to familiar geometry is indeed, that any angles
and dimensions are not given a priori, but appear a posteriori by making
significance. This is to notice, if the inverter is physically considered.
Especially then, the here demonstrated derivation of angles is of interest.
2.2.1.2.1. DIMENSIONS
At least one dimension is needed to make a geometry.
Our notion of such a dimension is a straight line, which is seen as a quantity
of points in a single direction. Such a straight line, which is due to this
notion not the only one in the world, can not be drawn, if there is no space
defined, where this occurs. There has to be more than one angle too, if
different straight lines are to draw, which shall to be distinguish. This is
needed even if the lines are parallel or are given by two points in the line.
Those points are not to define without angles, which then define dimensions.
As simple as this notion seems to be, as complicated it is...
The points as introduced under 2.2.1.2. instead do not imply defined space and
angles, before a straight line can be drawn, which then is used to derive
dimensions of space.
These points are numbers and there is no need to know, how straight or how else
they lay in the space, because geometrical locations can be defined anyway.
Because of this, such a dimension can be multiplied at pleasure, not only three
dimensions defining.
The needed trick is well known from making images in screens. To get the
appropriate notion, I show a little derivation.
The points in a single dimension shall be:
..M..MMMMM..M..
If I take sequently five signs, each heap written not in one line, but in one
of three lines, then I get this image:
..M..
MMMMM
..M..
As in every case the points can be counted as well as numbers, there is no
problem to define start and end of lines or the whole image.
As the points are represented by a complete quantity of adresses, there are no
points or lines between. In every case, the image is complete, if the
significance of parts of the sequence is defined, which effects three lines
made out of one.
NOTION: 'raster'
In every case, points in one dimension can lay in more than one dimension, if
parts of the sequence are given, locating the points in other dimensions.
EXPLANATION:
I used this kind of expression because making images like that is well known
and only the here important is to make clear.
A rastered geometry is not only well known and usable, but possible and logical
too, because there is no infinity due to the familiar notion.
This is no lack, because till now also nobody went out from home to draw points
ad infinitum.
You can get images in three dimensions only by laying images in two dimensions
on a stack. The only important thing then is the distance between those points
in the origin dimension, which shall be neighbouring to built i.e. an ordinate.
Finally the points can get by making significance else dimensions as colour,
load or amplitude, each connected in a quantity of adresses too.
Thus there is no limitation of amount and origin of dimensions using such kind
of images. Besides this, operations in the range of dimensions can be done
indeed aequivalent to operations depending on quantities of points.
In every case dimensions are effected by making significance, using operators
of numbers as well as adresses.
ERGO:
One dimension of a quantity af adresses includes every possibility of any other
dimensions by making parts of the whole quantity.
RULE:
Dimensions are not a priori existant and in every case adressable and finite.
This is caused simply by connexion in every case. A not connected beyond
besides does in fact not effect anything in dimensions of this world.
2.2.2. REGISTER
While we considered till now times, short at pleasure, we now start to consider
such connexions of exits with entries, where times, long at pleasure, appear.
There the need of time for efficacy will not be involved.
I start the discussion showing a state machine, where the same value is
resulted inverted at one and not inverted at another edge. The relation is in
some respect similar to a switch, but results instead of two arguments A and S
only one argument at all entries, connected to each other.
The lines between the left and the right part are drawn interrupted, because
both parts shall be evaluated to relations, which finally connected will become
something new:
D-o--------- ----------->O------iQ
o--------- ----------->O
|
o->------- ----------->O
o->------- ----------->O-------Q
This state machine will result in the same way, if the exits Q and iQ are
connected to an entry at each other edge:
D-o--------- ----------->O-o----iQ
o--------- ---------o->O |
| o----X-o
| | |
| o----o |
o->------- ---------o->O |
o->------- ----------->O---o---Q
Now I vary the relation, so that the lines effected by D and connected to Q or
iQ too are removed, and I insert a switch between D and the relation, which is
open for the value at D, if the value at T is =L :
o---------iQ
|
D--o->-->O----------->O--->O-----Q
T--X-o-->O | |
| | | |
| o-->O o-->O |
o---->O--------X------->O
o--------o
If there is a L resulted at the exits of the switch, then something unexspected
occurs. The values at Q and iQ will not be changed by this and also not by
changing the value at D.
Thus this relation stores the value at D, if the value at T is =H .
The line quite at the bottom is new too. It does not transfer the value from
the left hand side to the right hand side, but reversely and thus different to
usage till now.
NOTION: 'back-line'
...is a line connecting an exit and an entry in the same relation, transfering
a value from the right hand side to the left hand side.
The relation can consist of a single inverter.
I define too, how to show a back-line, so that there is instantly to see, if a
relation includes back-lines.
EXPRESSION:
Edges shall be expressed, so that all entries appear in a column. Back-lines
shall be positioned quite at the bottom of the relation. Only the lines shall
be expressed like that, while any included relation shall be evaluated to the
right hand side.
EXPLANATION:
The here made notion 'back-line' is strictly to distinguish from the expression
'feed back'. That notion was introduced once by Norbert Wiener to express lines
connecting exits and entries in analogue electronical circuits, where
inversions are important too. But those inversions are not the same as in the
inverterlogic and depend on inverting positive voltage to negative and reverse
in relation to a certain voltage (ground). Thus a feed back does not transfer
the values H,L of inverters, but values, which were to express as signs.
As I made up other notions, I will the make up the notion of back-line more
fundamental too. Just a single inverter oscillates, if a back-line connects its
exit with its entry.
But in example of a register we can see another consequence of back-lines.
This effect may be imposing enough to convince everybody, that the physical
measured time in logic can't be ignored. While the time in case of oscillation
might be abstracted to an ignorable trifle near to null, the time in case of a
register is as long at pleasure to hold a setting at the edges connected by a
back-line, if there is not a certain value at the entry named T.
Thus already a rule can be stated depending on consequences of back-lines.
RULE:
Back-lines connecting entries and exits of even series can cause storage
dependent on connected relations. Back-lines around odd series cause instead
oscillation in every case.
The case of storage enebled by a back-line around an even series shall be
confirmed facing a variant.
The following relation too, extended by inverters before every entry and behind
every edge, does nothing more change than inverting the effect of values at T:
o---------iQ
|
D--o->->>O->-------->>O->>>O->---Q
T--X-o->>O | |
| | | |
| o->>O o->>O |
o--->>O->------X------>>O
o--------o
Storage can appear even undesired as blocking and is of interest next.
Oscillation can be inconspicuous, because the period of oscillation can last at
pleasure, if complicated and deep relations include a back-line. Besides this,
there was to state periodicality facing numbers, which is not caused by a
back-line but by finity.
Considering the switch, I stated already, that significance and insignificance
need not to be distinguished, if the lines for arguments and switching stay
connected to each other. This is the case of a register. Here the significance
appears as a state continueing at pleasure, while any new value at D can not be
resulted.
Insignificance does not at all appear as a value at the exits of a register and
is therefore complete identical to storage, which is effected by a back-line
around an even series, which can not change the setting due to insignificance.
Indeed storage occurs in minimum 4 inverters in the right part of the images,
but dependent on the relation of 2 edges in series.
NOTION: 'Register'
Registers are relations including a back-line around an even series and a
switch, whose state of unsignificance can not effect a change at the exits.
You can indeed the value to store set using D and T, but could desire to force
this value directly in the register, which is of course only then stored, if T
gives the state of unsignificance.
I show here an extended Register, where the results at Q and iQ can be forced
using S1=H or S2=H :
S1------------------->O---------iQ
D--o->-->O----------->O--->O-----Q
T--X-o-->O | |
| | | |
| o-->O o-->O |
o---->O--------X------->O
S2----------------X------->O
o--------o
As you can remove the relation connecting D and T to the edges at right hand
side without a loss of storage effect, you can see, how storage is effected
on principle.
For further consideration additional notions are to make up.
NOTION: 'read', 'store', 'trigger', 'data'
A register is in one of two states switched by the value at the entry, which is
named here 'T', the trigger-entry.
The one value switches the register to read the value at the entry, which is
named here 'D', the data-entry. The other value at the trigger-entry prevents
of reading and thus enables storing the value, read at the data-entry, which
will be resulted at the exits, which are named here 'Q' and 'iQ'.
EXPLANATION:
Whenever values shall be significant in the real world, then registers will be
useful to store and to give values, if states are to order in time. Indeed such
an order can be achieved too using series, but then occassionally lots of
inverters are needed only for delay purpose.
Thus a special shortening is to state, which is considered in detail in an
other context.
There are other kinds of storing values well known, useful to give arguments at
relations. These are capacitors, magnetical domains or reflekting deepenings
(CDROM). Such a storage is not logical, but can be logical adressed. I do not
consider this, because I intend to explicate the inverter-axiom.
Next there are to consider some relations in detail, which can be built with
registers. Therefore I will use another expression, which is suited to show a
register more simple:
EXPRESSION:
A register shall be expressed too showing only entries and exits. Therefore the
already used signs shall serve, T=trigger, D=data, Q=not inverting exit and
iQ=inverting exit, written like that:
D Q
T_iQ
The results Q=H and iQ=L are to assign to the value D=H, while T=L switches the
state for reading. The back-line is implicated.
EXPLANATION:
Thus a setting is defined, which could be occassionally an other one, if the
relation is considered in detail. Also varying can enable shortening in respect
to inverters before and behind the relation. But this is ignored using this
expression. Back-lines including a relation, which could be a part of the
register, then are shown externally on principle.
2.2.2.1. COUNTER
If registers are used as value-giver for an incrementing (or decrementing),
then the values at the entries, which were arbitrarily defined under
2.1.3.2.1.1., will become a state, which allows to count periods in a time,
which for the first was ignored while considering incrementing.
NOTION: 'Counter'
...count periods as arguments at the least significant carry-entry and result
the count as a number.
Such relations are well known and very important in digital electronic. Because
of this, they are considered here only in respect to inverterlogic.
On principle the register is serial connected in the back-line between results
and arguments. As storing is possible during the whole period H\L/H, this
period needs to last shorter than efficacy in incrementing or a second register
has to be serial connected in the back-line.
The trigger switching those registers between read and write will be related to
something else than arbitrariness of an observer only in further consideration.
At first the general case is to consider:
Then a register is used for each place of same validity in argument and result
and the exits of the result-registers are connected to the entries of the
argument-registers. Every trigger-entry of argument-registers is connected to
each other as well as every trigger-entry of result registers. Both lines then
are connected inverted to each other to the trigger, so that the registers are
reversely switched from reading to writing. Thus arguments are only read, if
results are stored and results are only read, if arguments are stored.
The carry in the most significant place shall not be of interest now.
If the incrementing is only named and not drawn, then the relation looks like
that:
1st place-----o-D Q---incrementing---D Q-o-1st place of next greater number
trigger----o--X-T_iQ o-T_iQ |
| o---------------------X------o
o->----------------------o
Arguments can be numbers or values of adresses.
If a sign, which is =H in every place, is connected to all places Q of the
result, then the next trigger starts iterating a complete quantity of adresses,
while the values are numbers.
The shown counter counts 'upward'. This variant can count 'downward':
1st place-----o-D Q o-incrementing---D Q
trigger----o--X-T_iQ-o o-T_iQ-o-1st place of next greater number
| o---------------------X------o
o->----------------------o
The incrementing becomes decrementing here by reading the arguments at exits
iQ and writing the results at exits iQ too.
2.2.2.2. SHIFT-REGISTER
If registers laying parallel are used as value-giver for numbers, then the
exits are places too.
These values can be displaced to other places using back-lines. Thus the
the relation can effect the same as the operator shifting, already introduced
under 2.1.3.2.3.
A first example:
trigger---o-T Q---o---1st place
1st place-X-D_iQ |
| |
o-X--------o
| |
| o-T Q---o---2nd place
o-X-D_iQ |
| |
o-X--------o
| |
| o-T Q---o---3rd place
o---D_iQ
This relation is able to shift the argument from the 1st place to the next
higher place during the next period of the trigger, if the value at the
1st place exists only during a first period and an other value is resulted in
every place Q
You can instantly see, that this relation is to extend similarly to the counter
to prevent of overlapping the existance of argument and result in time. But
here only the principle is to demonstrate and thus you may be pleased by only
a result-register for each place.
There also shall be only of interest, how values are changed by the back-lines.
NOTION: 'shift-register'
...is a relation, where back-lines between parallel registers are used to shift
values to others of the parallel registers, also due to the count of periods
appearing at the trigger-entries.
Of course you can shift else significant values, if the places get not the
significance of numbers. And of course you can vary the relation by connecting
relations serial in the back-lines or connect the back-lines in an other way.
2.2.2.2.1. CHANCE
One of the possibilities to connect relations serial in back-lines is this,
only made up to demonstrate the principle:
trigger-------------------o-T Q---o---1st place
place 1--o-->O-->O--------X-D_iQ |
o--------X-->O | o-X--------o
| | | | |
| o->>O-->O | o-T Q---o---2nd place
o---------->>O o-X-D_iQ |
| | |
| o-X--------o
| | |
| | o-T Q---o---3rd place
| o---D_iQ |
| |
o----------------------------------o
Here a comparator is serial connected in a back-line to place 1, using the
character of a comparator acting as a switchable inverter.
The values at the exits Q can get the significance of a number, which then is
in the range of possiblities seemingly given by chance.
Such a relation is well known as 'random number generator', but of course
extended for usage as a dice box by more places, more back-lines and connexions
to else places than the first one.
There is well known too from playing with this toy, that the sequence of values
is periodically repeated.
You need not wonder about this, if you rely on the here made notion of numbers.
The chance is no chance, because the relation is logical.
The numbers by chance are numbers as every other numbers and built a
number-system, given by making carries as already demonstrated under 2.1.3.1.1.
Because of this operators for such a number-system can be made, which of course
do not result due to the significance of places in the dual digits system.
But in such number-systems the next greater number follows the next smaller
number too.
RULE:
No setting can be made by chance or be a chance.
EXPLANATION:
This seems to enjoy weathermen, but they will be disappointed, because there is
certainly a relation thinkable, where not at all during all time of the world a
value can be shifted from the smallest to the greatest number.
Other explications may be more imposing, because commonly a chance is seen
opposite to rules or will.
Because of this there is to say clearly, what the rule really states:
In a logical relation there are per definitionem no inverters connected without
a value and only while considering them there, there is an extern positioned
observer, who is able to mount relations and give values at his pleasure.
Thus the inverter-axiom where violated, if chance was allowed.
On the other hand side the count of numbers can be so immense, that an observer
facing only 32 places of such a number in much more places, is of course able
to think of chance, chaos or apparition.
This means mainly, that causality can not be violated.
There is logic in the world or not, while the latter is to dispute with less
efforts. Then the world ist finite, countable and logical. Tertium non datur!
An observer, who wants to make such a world, has to keep to this and can not
wish to intervene - as the observer, who I am here...
Nevertheless you can not find the cause of connections inside inverterlogic,
but only outside in arbitrariness of an observer. Thus a 'chance' is thinkable,
causing connections of inverters, which are not yet part of any relation, but
not part of this world too. The amount of these ones then can be infinite too.
Finally there is a reverse disintegration of relations thinkable.
As the physical aequivalent of the inverter-axiom needs to contain besides the
dimension of time a dimension of energy too to be existant as effect, a not
connected inverter then could be a quantum of energy outside relations. Also
values apart from inverters are thinkable, which so to say 'condense' as
inverters, if they meet entries or exits of connected inverters. Then connexion
is to think using notions of absorption and dissipation.
Moreover the statistical noticed 'probability' does not violate causality, if
the here introduced notion of adress is used. Then probability is playing with
possibilities in ever the same quantity of adresses, with the advantage too,
that this quantity does not vanish near null, but contains a logical border
and is countable. Every problem in describing natural processes using known
mathematical expressions, which are derived from infinitesimal consideration,
is obsolet using inverterlogic.
But I do not want to consider here all this possibilities in detail, because
they become evident only by experiments and are not to derive from the
inverter-axiom.
2.2.3. ITERATION MACHINES
Obvious an inverted adress can be used too to switch reading and storing at the
entry T of a register, then making the register read adressable.
We could already create a complete quantity of adresses using a counter and
start now to consider, how this and other quantities of adresses can be used,
if there are registers in a relation, which are made up to store adresses.
The stored adresses then are those dats, which are already under 1.2.1.
introduced as aequivalent of the relation 'adress', here also named as 'values
of adresses' opposite to 'values at adresses', which can be dats at pleasure
and therefore also adresses, then stored in adressable registers.
In further consideration I will talk about a register too, if I do not mean a
single one for one place, but a lot of registers, which are adressed by a
single adress, the same for each of that registers, which can i.e. built a
register for 8 places, storing a 8dat.
Then every adress can be used to read more than a 1dat.
And only in this way an adress can be stored.
I will not use the expression 'width' here to distinguish the count of places,
because different such widths will be to distinguish.
EXPRESSION: 'bus', 'busses'
A count of lines connecting places in registers and other relations to each
other, are a bus, if the setting there is of significance in certain states,
but not else. The width of a bus shall be identical or smaller than the width
of dats in the such connected registers, and is expressed as well by using a
praefix.
The plural of bus are busses, which are distinguished by reflecting the
significance of settings and states.
The significance of busses will be signed using a praefix in further
consideration. Thus I will talk about a databus, adressbus a.s.o.
EXPLANATION:
This is a very common expression, which I needed only to introduce here without
the need of change. I only ordered states in the same rang as significance of
the multi-place values. This normally is not done in such a strictly way as
lots of lines are laying parallel to busses in reality, which are used to
switch between significance an insignificance or even between different
significances. But I want to keep the significance of dats in registers apart
from dats, used to control states, and I want also be able to distinguish
between busses and any other lines, laying parallel at pleasure.
Obvious expression of registers connected by busses can be done now by showing
only single register and lines (1dat) without a loss of intelligibility.
A counter, connected to registers, can now represented like that:
(adressbus)-D Q-inkrementing---D Q-o (databus)---D Q--(resultbus)
-T_iQ counter_adress-T_iQ o-(adressbus)-T_iQ
Here the single registers represent more at pleasure and in the same way
connected registers, while the lines built a bus. In this case the counter acts
as adress-giver for a lot of registers, which are named 'storage' in further
consideration. While the counter writes the result at the adressbus, it reads
this value as argument at that bus.
But we need to distinguish the state of writing from storing depending on the
the registers at the resultbus, if the dats should exist unchanged. Those dats
will be ORed and changed by that, if the width of the resultbus is equal to the
width of the registers as defined.
NOTION: 'write'
...is a state made by a switch at the exit of a register, connected to the
adress of the register, so that the result is insignificant at the bus without
the adress.
This switch needs to be connected between exits of registers and entries of an
edge, which makes one place at the bus out of ORed places of the same validity
at registers. It looks like that:
write=H----------------o->>O
1st place,1st register-X->>O--->O->-------1st place,Bus
adress,1st register----X->>O |
| |
o->>O |
1st place,x.register---X->>O--->O
adress,x.register------X->>O
|
Here the value H at a first edge is ORed at the odd entries of a next edge.
If there is none of the registers writing, then the value in each place of the
bus is =L. In this case the exits Q of the registers need to be used, which are
not inverting the stored argument.
If you want to remove the inverters serial between edge and bus-line, then the
results of the registers need to be taken from exits iQ or the arguments need
to be read inverted.
If you want to prevent of a second adress for writing, then the state write has
to be connected in that way, that it switches reading, if write is inverted.
The result of that connexion then is connected to every entry T of a register,
looking like that:
read=L-------------->O (databus)--D Q
adress,x.register-->>O->-----------T_iQ
The combined state write/read, connected to the adress of the register, enables
shortening of the two busses 'databus' and 'resultbus' to one. Then these are
the same lines, which built back-lines too between result-exits and
argument-entries in respect to adressing.
In the next images in this chapter, I will show only the adress connected to
the trigger-entry T, but imply in every case a connexion before T and after Q
for making states of write/read.
RULE:
If more than one register shall write or read at a bus, then the adress is to
connect to a further place giving the state write or read. The exit of a
register has to be switched to insignificance in respect to the bus, if there
is no adress given.
If dats shall become an adress as intended in this chapter, they need to lay at
the adressbus. Therefore at least one register is needed, which is connected
at its entries to the databus, but at its exits to the adressbus. As there can
lay adresses given by the counter too, a switch is needed too here to switch
writing of the different adress-givers. Besides that, the discussed relation
now looks like that:
o---------(adressbus)--------o
| o-(databus)--o |
counter--------D Q-o o----D Q----o--D Q-o
counter_adress-T_iQ o------------T_iQ o-T_iQ
adressgiver1_adress-----------------------o
This image demonstrates too, that the adresses of counter and adressgiver1 have
to be connected in such a way, that at least three states will be available:
1) Adressgiver1 reads at storage, while the counter adresses
2) Adressgiver1 writes and adresses in storage, while the counter reads the
adress as the next argument.
3) Adressgiver1 writes and adresses in storage, while the counter does not read
a next argument.
How the connexion has to be made is not of interest now.
We can see, that this relation does not only assign a quantity of dats in
storage to a quantity of adresses, but changes the sequence of adresses too, if
the trigger at the counter for reading at the adressbus can not be hindered.
We can see too, that using the second adress-giver the sequence of adresses at
the adressbus is made out of two quantities of adresses, which are both
included in the complete quantity of adresses, which the counter can give, but
are not identical in respect to the sequence of adresses. Especially the
relations 'smaller','greater' between next adresses are not existant.
But in every case the quantity of adresses at the adressbus, is not only caused
by values in the storage, but by the adresses given by the counter too.
The adresses, given by the counter, and those, given by other adress-givers
are to distinguish in other respect too. While the values of adresses, given by
the counter are in fact numbers, the other adress-givers can give adresses at
pleasure in a seqence at pleasure and in respect to a significance at pleasure.
To be able to distinguish such quantities of adresses, we need a further...
NOTION: 'adressrange'
Adresses, which are possible during a certain state, are an adressrange of a
certain significance.
EXPLANATION:
So adressranges are not characterized by a complete quantity of adresses, but
by condition and significance. They can but need not be neighboured, and they
can be overlapped or nested.
This notion is intentional general to prevent of the need for more notions,
which in every case characterize a certain quantity of adresses, only
exceptionally to use like numbers.
While for the first states and significances will be meant, given by only some
values, next more complex situations are to consider, where states as well as
significances can be taken to pieces, but are always related to certain
quantities of adresses.
If only adress-givers were connected to the adressbus, which read adresses in
the storage, then the registers there were usable only to write the next
adress, where the next adress is to read. But if dats shall not be adresses or
shall become adresses after an operation, then adressing can not be done
without the counter as adress-giver, because the incrementing results a next
adress even if no adress is transfered over the databus.
Now the needed extension is to consider, which enables manipulation of dats and
first their sequence. Therefore a dat needs to be read in one register and to
be written to another one. Then two adresses need to be given at the same time
and consequently at two different adressbusses. The adress of adressgiver1 can
lay at that second adressbus too.
(adressbus1)--------o------------------------------------o
| o-(databus)-----o-------o |
counter--------D Q-o o----D Q-------o--D Q-o----D Q-o
counter_adress-T_iQ o-------T_iQ o----T_iQ o-T_iQ
(adressbus2)-------------------------o------------o
To shorten expressions, I will use some abbreviations now.
The storage, adressed at adressbus2 is 'A2' opposite to the already mentioned
storage 'A1', which is adressable at least in two adressranges using counter or
adressgiver1, which is 'Ag1'.The adressranges, adressed by Ag1 are named 'Ab1x'
where 'x' is a number. Then the situation is:
The counter adresses at A1 in Ab1 and Ag1 in as much as liked Ab1x.
The needed adress-giver at A2 could read at the databus, but the adress of this
adress-giver must not be given at A2.
The same reason, which made a second adressbus needed, now would make a third
adressbus needed and for the adress-giver there a fourth one and so on...
Thus adress-giving at A2 has to be done in quite an other manner as at A1.
As adresses at the second adressbus are needed always then, when data shall be
transfered over the databus, the needed adress-giver can be adressed at the
first adressbus, if its adress is to read at the same adress or an adress in
always the same distance to that adress, which adresses the dat to transfer,
and if this adress-giver stores already the adress to give.
This looks like that:
(A1)----------------o-------------------------------o
| o-(databus)--o-------o |
counter--------D Q-o o----D Q----o--D Q-o--D Q-o
counter_adress-T_iQ o-------T_iQ o-T_iQ o-T_iQ
| -D Q--o | |
o-------T_iQ | | |
(A2)------------------------------o--o-------o
This relation enables indeed the transfer of dats, but only conditioned by
values in adress-givers at A2.
Additionally the state write/read has to be given combined with the adress at
A2 and as well as needed for registers at A1 as at A2 while distinguishing
between Ab1 or Ab1x.
ERGO:
Adresses can be set at the second adressbus only then, when they are written
using an adress in always the same distance to that adress, which is given by
the counter. The distance may be =0.
But adress-givers at third or further adressbusses can be connected in the same
way as those at the first adressbus between databus and their adressbus. They
can adress adress-givers at the second adressbus too.
Finally adresses can be set at more adressbusses than the second adressbus at
the same time by the same way.
Thus there is to state a peculiar relation between adresses at A1 and A2, which
needs not at all to be a relation between numbers.
Adresses at A2 are no numbers, but not ordered adresses with a significance at
pleasure for the first.
RULE:
In a relation, where dats shall be written and read over a databus, there are
in every case two adresses needed each for the reading and writing register.
Additionally there is to decide at least the direction of transfer and the
adress-giver at A1.
Now we can get notions for adress and significance of other places in dats in
the Ab1, which shorten the explanation:
NOTIONS: 'programm', 'opcode'
An opcode is a dat containing at least an adress at A2 as well as places, which
condition states at data- and adressbusses.
An opcode can contain too data or values of adresses.
A quantity of opcodes are a program.
EXPLANATION:
These well known expressions are made up here as notions, which are not the
familiar ones, but depend on facts and not any purpose or things to sell.
I intentionally made this notion without respect to connexions, which may be
needed besides the already introduced ones for certain purpose.
In every case opcode decides, if the transfer over the databus is adressed at
A1 by the counter or Ag1. But if Ag1 adresses, then another opcode will be
adressed, which replaces this decision, if the first given opcode is not
stored.
Thus two states are to notice according to different significances:
During the one state opcode is adressed, while during the other state any dat
is adressed by opcode, which makes the significance.
Indeed any dat can be written at any adress given by Ag1, but not the value of
an adress to this adress-giver. Such values can only be written at adresses
given by the counter, and the value of the adress then needs to be contained in
the opcode and can not be stored in the Ab2, because there Ag1 has to be
adressed as a reader.
So only certain adresses can be written to Ag1, which are only to change, if
Ag1 adresses this certain adresses for reading a new certain adress.
This is only to condition by opcode.
In every adressrange there can be connected on principle operators between two
registers similar to the counter, including the operator for incrementing.
By this way further possibilities appear to manipulate not only the sequence of
dats, but the values H,L in dats too. Also dats, which shall become adresses,
then are not only to operate in the counter, but in Ab1x and Ab2 too.
Finally operators, which can operate dats, enable making adressranges without
special connexions, only conditioned by program.
EXPLANATION:
I stated under 2.1.3., that logical machines can not be transformed to values
of adresses, which can appear ANDed as a quantity. I found too, that the
possible representation of logical machines by signs is much too complicated.
As I now introduce logical machines as registers and operators as adressable,
I seem to contradict that statements.
Because of this, there is to urge, that adresses in the here discussed relation
do not represent anything else than their values. Registers and operators (and
else parts of relations to introduce next) are making the significance of these
adresses. The significance is caused by a value in every case. Even if those
values can be values of adresses using adress-givers, the values of adresses,
where these values appear, are no conclusion of the values at the adresses, but
the values at the adresses are the conclusion of the values of adresses.
While adresses can be connected as quantity by ANDing, ANDed values at adresses
are obviously no quantities, but results.
Now a relation is derived from the scetched task, which enables to operate
values at adresses, resulting values of adresses, and to use values of adresses
as adresses. The same relation additionally enables operating any dats at
pleasure, which is an unavoidable side-effect here.
We had to state, that there have to be at least two adressbusses, and that
the adresses used in A2 need to be in storage, adressable at A1. Obvious the
adresses used at A2 need to be already stored before anything can happen in the
relation. Besides those adresses givers of states need to be adressed too. In
this context, even the simultanious adressed dat is at pleasure, which can be
transfered over the databus. The significance of this dat is made only due to
adresses at A2. In short: Not only connexions, but a program too needs to be
defined in the relation.
NOTION: 'iteration machine'
An iteration machine is a relation including at least two adressbusses and one
databus.
At the one adressbus there are at least two adress-givers connected, while the
one adress-giver has to be a counter or a shiftregister capable of giving a
complete quantity of adresses only conditioned by a trigger.
The other adress-givers need to read at the databus. These adress-givers adress
registers, which write or read at the databus or read at the databus while
write at any adressbus.
At the other adressbus adresses are given by opcode, adressing either registers
reading or writing at the databus or registers reading at the databus and
writing at adressbusses.
EXPLANATION:
Making this notion, I ignored for the first the control of states. This will be
discussed next under 2.2.3.1.
Thus I ignored extensions of the relation, which are obvious needed to make the
relation act in a way, which can be accepted as useable. But I do not want to
ignore all the possibilities as only by this way there is to see, how important
program is, which makes in fact adressing and by that makes significance.
There is to keep in mind, that the notion of the iteration machine depends on a
prototype, which can not be simplified, but needs to be extended.
The discussion demonstrated, that such extensions are made out of adressranges,
significances and states besides operators.
The operators therefore need to be connected between registers and so are
nothing depending on the notion of a iteration machine.
Of course further busses, used for adresses or data, can be intended, but are
not needed. In this respect the common construction of CPUs can be shortened.
This notion gives the advantage to decipher the logical core of things, where
obvious 'information' is processed. There is not to dispute, that logic is
ruling such processes. Here is demonstrated, how this ruling is done in
general.
Obvious there is not only to notice, that 'information' is processed, if there
is not to notice a relation like any possible variant of an iteration machine
or at least a state machine or a phase machine, which is real.
While the sketch of the task starting this consideration only aimed to usage of
adresses and values of adresses, now there is to notice that the iteration
machine as solution of the problem is capable of much more possible usage.
Besides this, there is to see, that the iteration machine can be seen as a
peculiar variant of any state machine, deep at pleasure, if operators or
elementary connexions are adressable.
ERGO:
While in state machines only lines are needed to make results of one part of a
relation be arguments of a next part, in iteration machines only adressing
establishs such connexions. This is possible, because an adress can exist
totally aequivalent as a dat, if there is an opcode, which makes the dat be a
valid adress using an adress-giver.
RULE: 'second converting-rule'
Lines can be replaced by adressing.
EXPLANATION:
This rule does not depend on every line, but on lines between logical machines,
which transfer arguments or results in many places at once. So these lines
connect in every case registers in iteration machines, which can be omitted too,
if the transfer is not conditional adressed or establishs back-lines.
But I made this notion without respect to an iteration machine, because
adressing is possible too, if an iteration machine is minimized unrecognizable.
This would be the case, if adressranges are limited to only few possibilities
and program is made only of parts of a sign. Then the more general case of
phase machines is given, and then shiftregisters instead of a counter can serve
as adress-givers too. Nevertheless, such machines can be converted only in few
parts.
2.2.3.1. CONTROL
Now I start to consider significances, states and adressranges, already
recognized as needed while derivating the iteration machine. Something will be
needed too, but can be only considered after recognizing significances, which
are caused by different sequences of opcode.
Then time is most important, which was to notice till now only as arbitrary
trigger in phase machines, but conditions here the sequence of opcodes too.
NOTION: 'control'
...are connexions as well as places in opcode and triggers, which create states
in iteration machines.
EXPLANATION:
So control includes as well as adresses a duality. The one side is a certain
connexion, while the other side certain values are.
The common notion is here strictly limited to conditions inside an iteration
machine, so that arbitrariness depends only on a change of value at one entry,
which then is an on/off-switch, manipulatable not-logical at pleasure.
The needed trigger-pulses need to be derived completely from a trigger, which
effects switching of the resultregister of the counter between write at A1 or
read results of incrementing.
As every state at A2 is conditioned by states at A1, the states at A1 at least
need to be given before they rule to avoid overlapping the state making them
given. Therefore the places, which condition states, need to be stored in a
register named 'controlregister'.
Also the program needs to be stored before anything can be conditioned by it.
And obvious there has to be a starting point.
While the values of adresses are not ordered, the numbers are, given by the
counter as adresses. So there is a certain next adress, a start and an end of
of the adressrange. Because of this, the starting point of every control has to
be effecting the setting of the counter. This can be achieved using entries S1
and S2 at the resultregister of the counter, as demonstrated under 2.2.2.
Values at that entries can force certain values at exits without the need of a
trigger.
Till now a used as givers of settings connected signs. This can be done here
too with signs, which intermediately are connected to entries S1 or S2, while
T effects insignificance at D. After this every place S1,S2 needs to be =L
again.
EXPRESSION: 'reset'
...is a needed part of control to effect a start state in an iteration machine.
In further consideration of control I will suppose a trigger-giver, which is as
simple as can be an odd series, where a back-line connects the last exit to the
first entry. Another solution of the timing problem can be made using
back-lines from switched on parts in an iteration machine, which enable
switching off those parts too.
These two solutions ('synchronous'/'asynchronous') shall be only mentioned here
and not be discussed in detail, because there are a lot of details to notice.
I show the reset as a trigger-giver connected to a monoflop, used to switch on
using the pulse =H. There is shown a counter too, where 'inc' means the
incrementing between argument- and resultregister. 'S' is connected to Ag1 in a
way, which is not similar to the relation, shown under 2.2.3. for writing at
the databus, because here the trigger adresses.
monoflop: trigger-giver: resultregister:
L --->O o-----------------o
o->O->>>O--------->O o-D Q-inc-D Q-S-o-(A1)
On=H\L -o------>O o->>>O-o------T_iQ o->-T_iQ
o------o-----------o-----------------t
Using S2=H the adress =0 is written to the counter, t is the line for the
trigger-pulse, which is connected to the back-line around an odd series, the
trigger-giver.
In this relation the trigger-puls t=L is the range of time, during which the
counter normally writes at A1 while reading there with its argumentregister.
This is the final decision, that the opcodes are given during t=L and that then
the places, needed for control, are to write to the controlregister.
If any dats, not used for control, are to adress at A1, then this can only be
done during t=H, because only then an adress, which is a part of the opcode,
can be already written to an adress-giver and only then no opcode is adressed.
ERGO:
As states need to be given before making any signficance, there need to exist
at least two alternate states in an iteration machine, if besides dats giving
states else dats, especially adresses, shall be transfered over the databus -
and this indeed was the intention for deriving the iteration machine.
RULE:
An iteration machine needs to be at least in two states. In the one state
control is conditioned, in the other one control is done.
In the further consideration I suppose the following significance of the
trigger-values at t:
EXPRESSION: 'controlphase', 'dataphase'
During the controlphase t=L the dat in the storage, adressed by the counter, is
written to the controlregister. During the dataphase t=H any else adress-giver
adresses at A1, which is here only Ag1.
During the controlphase simultaniously adressed other dats can be transfered
over the databus too. Especially adresses can be written to Ag1 in this phase.
As in an iteration machine the duration of efficacy is to notice, the duration
of the trigger-pulse needs to last longer than efficacy lasts in control,
registers and operators, especially in the counter. Here I use only the
shortest possible even series for the purpose of needed delay. If a relation is
intended to become real, then the inverters in the used relations need to be
counted to get the count of inverters needed for delay. Other delays in that
case are ignored here too.
Thus I only show an approach of the control, which is fit to end writing before
reading.
I will use the following abbreviations to make the image intellegible:
The line for reading of registers 'l'
The line for writing of registers 's'
Registers are not showed and are connected between an entry, reading or not,
and an exit, writing or not. Also the lines for adressing are not showed. How
these lines are connected to lines for data and read/write, was already
demonstrated under 2.2.3. Here the values H,L are equal significant.
Q1,Q2,Q3,Q4 are exits of the controlregister, which are not fully decoded here.
As there are 16 possibilities, shortening of the needed inverters is possible.
The periods of the trigger-giver appear at the line 't', set as demonstrated
above.
The adress at A2 is given by a single, always writing adressgiver, which reads
directly the opcode.
The adress at A1 can be given at exits Qz of the counter or exits Qa of Ag1.
Ag1 adresses always during t=H, the counter always during t=L
states at adressbus1:
t---o--------->O->O---------------T (counter-argumentregister,read)
Q1--X----o---->O | / read during t=H XOR t=L
| | |
| o--->>O->O
o-------->>O
K1--X->O->O-->>O
Q2--X->O |
| |
K2--X->O->O
Q3--X->O
o--->-------------------------T (counter-resultregister,read always)
o-------------->O
Qz--X------------->>O------>O->---x.place at A1
| |
o------------->>O |
Qa--X------------->>O------>O
o--->O
Q1--X-->>O
Q4--X--->O----------->O-----------T (Ag1,read places in opcode)
| A2-adress----->O
| states at adressbus2:
| controlregister:
x.opcode--X--------------D Q-----------x.place at A2
o--------------T_iQ or Q1...Q4
o->>O
Q1--X-->O
Q2--X->>O->O states at databus:
| |
o-->O |
Q1----->O |
Q2----->O->O-->O
Q4-------o-X->>O----->-l->>-s- / register adressed at A1
| |
| o-->O
o---->O----->-l->>-s- / register adressed at A2
The setting in places Q1-Q4 means using words:
Q1 conditions, if Q1=L, that the counter reads at A1 during t=L, if Q1=H,
that the counter reads at A1 during t=H
additionally conditions writing of every register at the databus, if the
argument of the counter shall be read during t=H
conditions too, if Q1=L, that data can be transfered while Q2 conditions,
if during t=L the counter or during t=H Ag1 adresses at A1 and therefore
data transfer is needed between opcode or else adress and a register,
adressed at A2
conditions too, if Q1=H, that during t=L and Q4=L Ag1 reads at the
databus independant of adressing Ag1 at A2
Q2 and Q3 condition, if during t=H and Q1=H the adress is to read in every
case or only dependent of K1,K2=H
These places condition, if the counter gets a new setting or not.
Q4 conditions the direction of transfer over the databus if Q1=L
Q4=L conditions writing of register, adressed at A1
Q4=H conditions reading of register, adressed at A1
additionally conditions, if Q1=H reading of Ag1 (see above)
Under 2.2.3.2. I will be able to demonstrate, that this minimal control is
already enough. Then the significance of places K1,K2 is considered in detail,
which are exits of a 'statusregister' and used to give as criterion if a carry
is given or a value=L is given in every place of a result.
Namely if numbers are to operate, then significances are to make dependent of
a result=0 or a carry. The need of this is already discussed under 2.1.3.2.
Here the adress of the next opcode is conditioned by this, if it can be an
other one instead of the incremented one in the counter. Carries in more places
which are possible using shifting, are ignored. Then a carry-register combined
with shifting can serve, where a carry is given, if not every place in the
the carry is =0.
There is to see, that the Ab2 can be small in every case, if only adresses are
to give of argument- and resultregister of operators or logical connexions and
at least one register for intermediate storing during data transfer.
The needed quantity of adresses at A1 will be much greater, because besides
program also data is to store there in adressranges at pleasure.
Derivating the iteration machine I connected every at A1 adressed register
with a part of the exits to the databus and another part to A2. Now there is
demonstrated, that besides an adress for use at A2 at least 4 further places
are to store during t=H in the controlregister.
In real iteration machines there will be a problem, if the same storage shall
be used for data as well as program. Then there needs to be a way too to write
control-dats and A2-adress over the databus. Under 2.2.3. I intentionally did
not define this part of the connexions.
A solution of the problem is to make the width of simultanious adressable
registers variable. But as this is only one of a lot of possible solutions, I
do not touch this problem. Here I want to explicate the inverter-axiom and not
to construct anything.
2.2.3.2. PROGRAMS
We recognized already, that the places Q1-Q4 are the essential part of control,
which conditions the significance of the other places in opcode. And we could
recognize too, that there needs to be an opcode at adress =0 during reset,
which contains the needed first values for control.
As due to the second converting-rule adressing is aequivalent to lines, now
there is to consider, how especially the values in places Q1-Q4 represent which
kind of connexion.
For this purpose I assign new names to the places, which represent from left to
right hand side the values Q1-Q4 and I will talk about 'controldats', if I mean
these values. The value 'x' then is H or L at pleasure.
xxxL next Opcode at next higher adress, adressed using the counter
is 'data transfer' over the databus, which can happen during
t=L or t=H. During t=L always places in the opcode are written
or read, while during t=H dats at pleasure, adressed using Ag1
are written or read. Then Ag1 adresses an 'indexed' transfer
opposite to an 'direct' one, adressed using the counter.
LxLL Write adress or value to register during t=L
reader is in 'adressrange2', adressed by opcode
writer is in 'adressrange1', adressed by counter
abbreviation: 'Ld,adressrange2'
LxHL Write adress or value to register during t=H
reader is in 'adressrange2', adressed by opcode
writer is in 'adressrange1x', adressed by Ag1
abbreviation: 'Li,adressrange2'
HxLL Write adress or value to register during t=L
reader is in 'adressrange1', adressed by counter
writer is in 'adressrange2', adressed by opcode
abbreviation: 'Sd,adressrange2'
HxHL Write adress or value to register during t=H
reader is in 'adressrange1x', adressed by Ag1
writer is in 'adressrange2', adressed by opcode
abbreviation: 'Si,adressrange2'
Opcode LxLL effects writing data in places of opcode during t=L, while the data
is read using HxLL, changing the places in the opcode.
Opcode LxHL effects writing data in storage during t=H, while the data is read
using HxHL, changing the places in the storage.
If the commands Li or Si are used, the desired adress has to be already set in
Ag1, at the latest by the last opcode before. So these commands are conditioned
in every case by a command Ld,Ag1, given before. The adress, given by this
command, can be replaced using commands Sd,x as well as Si,x while x=register,
adressed at A2.
Data transfer is a connexion of argument places with result places, which can
represent a back-line from result places too.
In further discussion I will use names instead of adresses or numbers instead
of values of adresses. A transfer-command then looks like that:
Li,Augend
...meaning the opcode for writing to the augendregister of adding, while the
read register is adressed using the actual adress in Ag1.
Si,Summe
...meaning the opcode for reading the sumregister of adding, while the register
to be written to is adressed using the actual adress in Ag1.
Ld,Ag1
...writes the value of an adress to Ag1, which is read in the opcode.
Such adresses are called 'variable' too, if different values can be set there,
which are not an opcode.
Quite an other thing are the following connexions, varying the sequence of
connexions between Ab1,1X and Ab2. A quantity of adresses, given by the
counter, then can increase, dependant on values in this quantity too, because
certain adresses can be given repeated and therefore ambigious too - while
ambiguity can not at all extend the possibilities given by a program.
In such a way, sequences of opcodes can be repeated or alternated, due to
criterions.
xxxH next opcode at an adress not given by the counter are 'jumps'
in adressrange1 and thus are connexions of relations given by
opcode.
LxxH 'direct jump' using the adress in the opcode, which is written
during t=L to Ag1 and given during t=H
abbreviation: 'Jd'
HxxH 'indexed jump' using actual adress in Ag1
abbreviation: 'Ji'
In both cases the program is proceeded at the incremented adress, because this
adress is written to the argument- and not the resultregister of the counter.
Both kinds of adressing jumps are conditioned either dependant or independant
to criterions:
xHHH 'unconditional jump' kein Postfix
xHLH and K1=H 'conditional jump' Postfix: '1'
xLHH and K2=H 'conditional jump' Postfix: '2'
xLLH and K1=H and K2=H 'conditional jump' Postfix: '12'
A complete jumpcommand is i.e. 'Jd12,label' or 'Ji'.
On principle adresses of aims for jumping can be given not only 'absolute' and
thus usable as start-value in the counter, but 'relative' too, counting only
the difference of the adress to jump to and the actual one, which has to be
operated before use. Such relative adresses additionally need a
number-attribute 'negative'/'positive'.
Obvious the absolute definition of adresses to jump to is a shortening, because
operating the adress is superfluous. Nevertheless the relative adresses may
appear useful, because they are smaller and can be stored in less registers.
A peculiar kind of jump is the 'call of procedure', which is not lacking in any
CPU, I know. It is not available too lacking other relations, depending on the
'stack', because this adressrange is used to store the adress for jumping back
to the opcode after the jump to the procedure. 'Higher' programming languages
make up this to something more, a 'system philosophy'.
This kind of procedure calls and of course the dependant system philosophies
are total obsolete, because they do not cause only extended efforts making a
CPU or programs, but allow to spare only two explicite opcodes, while extending
control and causing two implicite opcodes, needed for transfer of adress to and
from the stack and additionally two implicite opcodes for incrementing and
decrementing of the 'stackpointer', an exclusive adress-giver for the stack,
which can not replace normal incrementing.
There are much more possible designs of programs using explicite indexed jumps,
which can aim different labels conditional too. But the here introduced control
enables direct jumps back too, if the aim for jumping back is written into the
opcode before it is used. In this case the adress of the aim has to be the
adresse of the opcode making the 'call of procedure', which is incremented by
the counter. Thus the program is proceeded at the next opcode after the opcode
making the 'call of procedure'.
Without the use of abbreviations, the indexed jump back is to do like this:
1) write adress to return to to Ab1x
2) jump
3) proceed using counter...
4) write at 1) stored adress to Ag1
5) jump indexed using this adress, which adresses either the
opcode after 2) or any other opcode instead.
By this way you can insert program between 3) and 4) at different positions in
another program, thus shortening programs distinctly.
I will name such parts of programs 'procedures' too, but do not implicate the
use of a 'stack' for storing adresses of aims to jump back.
As here at 4) an adress at pleasure can be read, jumps back can be conditioned
too between 3) and 4), which are impossible using other methods or are at least
not as easy to do, if possible.
In a process without 2) the final jump 5) can be conditioned in the same way,
enabling the use of not only two alternate adresses, but as much as you like,
conditioned by criterions as much as you like.
I complete now the introduced kind of expressions with the common kind of
marking adresses, which shall be a aim for jumping or store of a variable.
Therefore I use the praefix ':' before names of adresses, which can be refered
in commands. If the value at the adress is not an opcode, but a variable,
then a postfix '=' and a sequence of numbers shall be appended to the name
like this:
:variable=1
If values in opcodes are to define, then they are appended, separated by a
comma and using praefix '=' like this:
:startvalue Ld,inc,=10
...loading an incrementing, adressed at A2, with startvalue=10
:aimadress Ld,Ag1,=:Startwert
...changing the startvalue indexed with next command
As the here introduced iteration machine is minimized, adresses of variables
are in opcode too, thus not only aims of jumps are to mark using names.
Now we got a complete repertoire of expressions, enabling us to discuss
programs und possible connexions done by this way.
We were shure already during derivation of the iteration machine, that a
transfer of data over the databus is needed, but could not recognize jumps as
needed too till now. This is to discuss now:
If you want to store data besides program in the storage, then you can not
accept unlimited counting in the counter from greatest to smallest adress.
Obvious a new start-value in the counter is needed, before data is adressed
and supposed as program. This reasons the...
RULE:
Every program needs to include a last opcode for a jump.
This causes instantly a next rule depending on the significance of adressranges
at A1.
RULE:
There are at least two dimensions given in an iteration machine with the
significance of program or data, stacked in one dimension and to distinguish
by program.
Even if data is positioned in the midst of program, a jump has to be done over
that, thus making the significance in the program.
If we imagine any purpose of a program, we can see in every case not only a
a start with reset, but an end too, where the setting in the storage must not
be changed any more. Then a special way of jumping is to do:
:loop .......any last command before the last
Jd,loop
As the adress 'loop' in the opcode is incremented in the counter, this jump is
done always to the adress of the jump. The counter increments indeed, but
results the ever same adress.
If there were other opcodes between aim of the jump and the opcode of the jump,
then these commands were repeated too for ever.
NOTION: 'loop'
...is a quantity of opcodes at pleasure between an adress at pleasure and an
opcode of a jump, done back to that adress.
As there is something to do after reset in most cases, which has to be done
only once, every program consists auf an 'initialization' and a following
beginning of at least one loop.
But this is not the only needed jump. As we stated already, that operators can
result a carry or a null, we can easily see, that there are at least two
different sequences of opcodes needed.
This is equivalent to a switch in a state machine.
In an iteration machine instead two adresses, making such connexions, have to
be given as choice. The one is the incremented adress in the counter, while the
alternative adress is in the opcode or in Ag1. And of course the criterion for
decision has to be given at the same time.
As the counter can count only in one dimension and one direction, there are not
only jumps needed to one of at least two sequences, due to a criterion, but
another jump is to do too after ending the first sequence over the second
sequence to that adress, where the program is proceeded in both cases.
This looks like that on principle:
Ld,Augend
Ld,Addend
Jd1,carry ...be K1 criterion
Ld,Ag1 ...written adress is a variable
Si,Summe ...value at adress is written
Jd,GoOn
:carry ...consequences of a carry
:GoOn ...i.e. a further addition
While the sum is ignored here, if a carry is resulted, else the sum is written
as value of a variable. The sequence for the consequences of a carry thus needs
to follow the other sequence and needs to be jumped over at the end of the
other, first sequence.
Thus two dimensions of a program are made to one, which can be adressed by the
counter. In the same manner you can stack dimensions as much as you like in the
one dimension in the storage.
Conditional jumps can be needful not only inside a loop, but are suited too to
leave the one and go to the next, if a 'loop criterion' is reached, which is a
carry or a null after down counting repetition of the loop, finding a value in
an adressrange equal to a mask, or reaching a border counting up an adress or
lots of other tasks.
Finally an often needed sequence can be shortened to one, where multiple jumps
can aim to - the already introduced procedure.
Besides the already mentioned adress for jumping back, there are different
values to make usable in the procedure, due to the purpose of the procedure.
Thus a procedure is a loop with an always reached loop criterion, which can be
repeated by multiple jumps to it.
Now the second converting-rule, saying that adressing is equivalent to lines,
can be finally refined in respect to state and iteration machines too:
The obvious most important difference is, that in state machines lines can be
connected in three dimensions and can cross each other, while in iteration
machines there is only one dimension and program within representing such
lines.
NOTION: 'stack'
Values at adresses in an iteration machine built in every case a stack with a
lowest and a highest end. Not only single values are stacked, but stacks can be
stacked too.
The base-adress can be the lowest or the highest adress of the stack.
EXPLANATION:
A stack is the logical equivalent to the dimensions, demonstrated under
2.2.1.2.1. but is made out of quantities of adresses instead of points.
Thus there are values in more than one place at adresses to distinguish from
results of adresses in one place.
While stacks as well as adressranges are not to adress using complete
quantities of adresses, stacks are different to adressranges adressable by
incrementing an adress - there are no holes between lower and upper end.
Different to adressranges, stacks are independant of states and significance
given by only two values:
A base-adress and a length, which is the count of adresses in the stack. The
length can be either an addend or an subtrahend.
RULE:
A stack is characterized by a base-adress and a length, while the length added
to or subtracted from the base-adress is resulted to the adress of the next
value outside the stack.
In a stack an order is given, where numbers are used as adresses. Here the
order shall be extended with the intention to make the distance between the
adresses greater than one. Thus units are stacked, which are stacks too, but
are noticed in such a way, that dats with a greater width than registers can be
seen as elements of a stack.
NOTION: 'stack-entry'
A stack-entry is the smallest element in a stack.
The width of a stack-entry is always a multiple width of a register.
The step from one stack-entry to the next is done using addends or subtrahends,
which then are relative adresses.
The length of a stack is always the multiple length of stack-entries and can
defined as count of stack-entries too.
EXPLANATION:
You can instantly see, that there can be quantities of stacked dats too, which
can have significance in respect to very different counts of adresses - i.e.
the quantities of signs building sentences in this text.
Such quantities are obvious not to order using addends or subtrahends, but are
different stacks.
The places in a stack-entry could be taken as even smaller and always existant
elements in a stack. But these elements are not adressable using only adresses
at adressbusses and because of this shall be of interest only in respect to
operations depending on stack-entries.
Connexions, which can be parallel in state machines, are always in serial
sequence in a program and indeed sequenced in time. Thus there is a order
given, where adresses are not only characterized by validity of numbers, but by
moments too. Not only 'higher' but 'later' adresses are possible too, which can
be indeed 'lower'. But in every case these adresses are found in a range given
by an adressbus, which nevertheless does not limit the depth of the represented
state machines because of possible jumps back. Thus adresses are not unique
moments and programs can be processed infinite. Because of this a state machine
can be made equivalent to every state machine using a program.
As opcodes are stacked, sequences of opcodes between a start-adress and a jump
are stacks too, which nevertheless can be stacked at pleasure, if the jump is
a conditional jump and thus the next opcode can be the next to adress.
So the second converting-rule is to refine in respect to the order of lines,
represented in fact by opcodes, which can not be stacked at pleasure opposite
to lines in state machines, which can be drawn at every pleasure.
There are already mentioned consequences of this order, if carries are to
handle.
RULE:
Parts of relations in state machines, which can be positioned parallel,
effected by switches, can not be positioned parallel in programs. Switches are
to replace by jumps.
If values of adresses are arithmetical calculated intending to read or write
the values at these adresses, then different to opcode a order for stacking can
be given at pleasure.
Next I show an example, where an order of stacking is related to a criterion in
a loop, thus shortening the needed program:
A list shall be moved in the storage. This means, that values stacked at one
base-adress shall become the same values stacked at an other base-adress.
The length of the list is defined first.
Ld,intermediate,=10
Ld,Ag1,=:listlengh ...loop criterion
Si,intermediate
Base-adresses of source and destination are set.
Ld,intermediate,=1000 ...base-adres of source
Ld,Ag1,=:sourcebase1
Si,intermediate
Ld,Ag1,=:sourcebase2
Si,intermediate
Ld,intermediate,=9000 ...Basisadresse des Ziels
Ld,Ag1,=:destibase1
Si,intermediate
Ld,Ag1,=:destibase2
Si,intermediate
:sourcebase1 Ld,inkrementing
:sourcebase2 Ld,Ag1
Li,intermediate
Ld,Ag1,=:sourcebase1
Si,inkrementingresult
Ld,Ag1,=:sourcebase2
Si,inkrementingresult
:destibase1 Ld,inkrementing
:destibase2 Ld,Ag1
Si,intermediate
Ld,Ag1,=:destibase1
Si,inkrementingresult
Ld,Ag1,=:destibase2
Si,inkrementingresult
Count loop using a decrementing and condition jump back with K2, set in
decrementing, if result =0
This sequence can be positioned at beginning of the loop too, transfering one
value less - a rule considered later in further context. Such a sequence then
is called a 'loop-counter'.
:lstlength Ld,decrementing
Ld,Ag1,=:listlength
Si,decrementingresult
Jd2,GoOn
The following jump-command could be removed, if the conditional jump can be
conditioned using the inverted criterion...then aiming 'sourcebase1'.
A jump back from procedure could be positioned here too, aiming else adresses
than 'GoOn'.
Jd,sourcebase1
:GoOn .........at pleasure
Programers will be astonished mainly about handling of variables, which are
part of an opcode. This can be done in every computer too, but would make the
translation programs complicated and is because of this ignored in every case.
The here showed handling is a shortening, which makes the register for the
variable obsolet.
I demonstrate this using the last example, where I vary the opcodes for the
common use of adresses of variables and values at the adresses:
:variable=0 ...anywhere in storage
Ld,intermediate,=10
Ld,Ag1,=:variable
Si,intermediate
................other opcodes till loop-counter
Ld,Ag1,=:variable
Li,decrementing
Si,decrementingresult
But this handling of values at adresses is an advantage, if the value is used
in other parts of the program too and you can not decide where, because there
is conditional branching in a sequence, where the value has to be replaced in
every branch, but is needed in only one. Then the use of the ever same adress
of a variable in an opcode is the shortening.
Because of that I formulate the first shortening rule depending on program as
a possibility conditioned by purpose and not as a rule caused by connexions.
RULE: 'first possibility to shorten program'
Adresses for values can be replaced by adresses of opcode, if the value is
needed in only one opcode. Else adresses only for values are the shortening.
In respect to the sequence there is to state first, that you can not minimize
it. But you can optimize it in respect to the count of commands and speed, if
there was a counter available instead of Ag1, which increments the next adress
while giving an adress ('postincrement'). But then this incrementing could be
used only for this purpose and a second one in the Ab2 were needed.
The count used in the loop-counter can be on principle a addend for the
base-adress too, thus counting stack-entries at pleasure.
Because of this incrementing can be replaced by adding, extending Ag1, so that
sums are implicite added. Especially this implicite adding is needed, if more
than one program shall be in the storage, but is to edit with an unknown
base-adress.
Other adressing can be simplified too using less opcode, if it commands the
arithmetical calculation in a 'adress-calculator' without a changed control.
Then adressing using Ag1 has to be defined not only by a single transfer of an
absolute adress before an indexed transfer. Instead of the one adress of Ag1 in
Ab2 some more adresses were needed storing addends, which are to add dependant
to places in the statusregister. The same effect can be achieved by using
different adresses of Ag1 in Ab2, which condition the indexed adressing by a
final transfer to Ag1.
Then the needed calculation for arithmetical building of adressranges can be
done in a single controlphase, parts of the relation, used for calculation,
then can work parallel as in a state machine.
The number-attribute 'negative'/'positive' could be made usable too.
Finally there is to say, that such adress-calculators are usable in such loops
only then, when they do not touch criterions in the statusregister and thus
override loop criterions. Own criterions instead can be useful, if not a
loop-counter conditions the end of a loop.
RULE: 'second possibility to shorten program'
An adress-calculator can minimize the count of needed opcodes.
More than one extended adress-calculator does not increase proportional the
utility. Only one is most useful. The reason is easy to see. There is only one
program processed at a time, which can be shortened by using an
adress-calculator. More useful are more operandregisters for indexed adressing.
A second adressbus in the Ab2 is very useful too, because it enables the direct
transfer between to registers using only one opcode, if the width of adresses
in the Ab2 is at most a half of the width of adresses at A1.
Mainly more registers for intermediate storing can spare time, if the storage
at A1 is slower than the storage at A2/3 - always in real machines.
But then an extended control is needed - in real iteration machines this is
a standard feature of a CPU.
RULE: 'third possibility to shorten program'
If the width of adresses in the Ab2 is less than the half width of adresses at
A1, then a second adressbus in the Ab2 shortens the count of needed opcodes.
I demonstrated, that this extension is not needed a priori. But if it is done,
then the most possible count of registers in the Ab2 is to desire. Normal use
of registers for intermediately storing costs at least 16 adresses. At least as
much adresses are needed for arguments and results of operators, if not a kind
of adressing is made, which allows to assign values at adresses at pleasure
to entries of operators, while results are written back to that operandregister
- standard in most CPUs. This extension can shorten program too. But better are
further adresses in the Ab2, which enable assigning results to any register
besides an operandregister. This makes the repeated transfer of arguments
obsolet. Such extensions can be found in real adress-calculators, which read
arguments in the Ab2.
We could recognize, that a loop-counter can shorten a sequence of many opcodes
for transfer of many dats to a repeated single transfer. Thus a loop is not
only a nice end of a program. It is universal usable to shorten program.
RULE: 'fourth possibility to shorten program'
If more than one sequence of opcodes is needed, then this is to shorten to one
sequence in a loop using a loop-counter, which is usable, if the count of
repeated sequences is known before entering the loop.
Such a loop obvious can be repeated at pleasure using different loop criterions
shortening in such a way any immense count of loops to one, which then instead
has to be terminated with an indexed jump.
Now you can finally estimate, if the control, shown under 2.2.3.1., is suited
to enable every possibility for programs. I found some desirable extensions
depending on adressing at A1, and of course certain operators can be desired,
which indeed affect only the quantity of adresses in the Ab2 and places in the
statusregister.
A desirable second adressbus in the Ab2 would be the only extension causing
an extended control, but nevertheless would be needed to shorten program.
Thus the introduced control is a fitting minimum and enables replacing any
state machines by iteration machines and program with a range of adresses at A1
and A2 dependant on purpose.
Nevertheless special relations and an extended control are needed, if more than
a on/off-switch shall affect a process in an iteration machine. A well known
solution are entries for interrupting in real iteration machines, which make
uncalculatable values be a criterion for normally unconditional branching.
SUMMARY 2.:
I derived iteration machines only from the inverter-axiom and by playing with
possible connexions. Thus every variant is a mathematical formula, which can
be made up using the introduced shortening for certain purpose.
Also programs are related to the inverter-axiom and became a variant of
adressing, which can be replaced by state machines too, which can be made up to
constructions, which are suited for certain purpose and optimized for speed
without the need of program.
3. LOGICAL CREATURES
Up to here I considered machines, which have to be completely given.
In every case only a constructing human being decides, what a machine will do
or not. Also an iteration machine can only appear with a behaviour, which is
provided by a program. It will do in every case, what the program commands.
Nevertheless programs admit an efficacy of very complex logical machines, which
in fact exist only as a program.
So iteration machines are relations, where new relations can arise without the
need of connecting inverters. But without the machine and adressable operators
inside it, a program does not mean anything.
Now I will consider machines, where also operators and not only connexions
between them can be given using values. By this way also other relations can
exist as quantities of values. This admits to alter them.
Every relation can be obviously constructed by not only deciding, which exits
shall be connected to which entries, but in peculiar by deciding, which exits
shall be connected to which other exits to build an edge. Of course there is
additionally to give the efficacy of a single inverter, so if it exists or
lacks.
The obvious very small count of possibilities for connecting single inverters
can be easily given by only a few places for code. By this way relations become
ideas, which can be transformed and prooved. The therefore needed code is
different to opcode on principle and thus will be expressed peculiarly:
EXPRESSION: 'locode'
...are those places, where values H,L get the significance of connexions of
exits of inverters and inverting arguments.
Now a notion is to make for those logical machines, where locode establishs
efficacies, which distinguishs them from other logical machines.
NOTION: 'logical creature'
A logical creature is a relation, which is partly given by locode.
Such relations can be altered by results, which are effected in the same
machine.
EXPLANATION:
By this way an iteration is introduced, which is more than a repeated use of
logical machines. This iteration transforms the used machines too.
At once you can see, that notions are useable to describe such machines, which
are known as notions used to describe biological phenomenas. These machines are
invididuals in some way, which need to know that, because they do not proceed
a stimulus unconditional, but can use it to transform their inner relations or
even not.
So logical creatures need to include a self-confidence in that way, that they
got criterions to decide, if they do something or let it. By this way they are
able to evolve a character, they can get older and die, and they can get silly
or maniac.
Because of this I will use words here, which could be understood as the
statement, that logical creatures are equal to humans or animals. So there is
to state clearly at first, that there is a difference, which does never
disappear:
Logical creatures as well as every other relation are made by constructing
human beings, who initialize their behaviour. Opposite to this living beings
are initialized by a biological evolution, which started at individual cells
and their genoms.
I will not discuss here, what kind of differences are the consequence. Notions
and expressions, which seem to indicate an analogy in respect to living beings,
are to take metaphorical and are reasoned only logically and not biologically.
3.1. LOGICAL CELLS
Logical relations can obviously not come into being without logical relations.
But if relations can be established using locode, then the relations, which
enable locode to effect something, need not be quite similar to the here shown
logical machines or in peculiar iteration machines. There is to see first, that
the width of arguments is not as limited as it is in iteration machines. There
the width of busses, registers, opcode and operands was found dependend on the
trigger and a needed count of places, which are to define at the same time,
i.e. to give an adress.
Opposite to this a logical creature can be constructed quite different.
In peculiar sequences can exist parallel and interfere without recursions. The
branches, needed in iteration machines will look different, if especially the
criterions are proceeded parallel. And they can more than that effect back on
locode instead of effecting only conditions for branching in existing program.
As there appear at first sight at once much more possibilities of connexions
at a time, I will limit the consideration for the first to one type of a
relation, which is like an operator positioned between adressable registers in
an iteration machine reading arguments and writing results in an already
demonstrated manner. Different to operators, then making carries and
effecting arguments can be variable at pleasure.
As a relation, given by locode, cannot be made without a storage, there will be
besides special purpose a variant of an iteration machine needed to build the
mechanical environment for the relation making efficacy using locode. Then
there will be a trigger too for writing locode and arguments and reading
results. In peculiar then results are able to condition jumps and to thus to
change branching in an existing program.
At first I show the 4 possibilities of a locode in two places, related to
possibilities of making edges and inverting in one place:
edge
locode=LL: |
argument1------>-X---------result1
|
locode=LH: |
argument2--------O---------result2
|
X edge absolutely interrupted
X edge absolutely interrupted
locode=HL: |
argument3--------O---------result3
|
locode=HH: |
argument4--------O---------result4
|
Again in words:
locode=LL effects an inverted argument, which becomes the result in one place.
This place will be bridged by an edge and not influenced too.
At this edge can be, but need not be connected other arguments.
Every other locode effects a not inverted result at an edge with even entries,
where neighboured arguments need not be connected.
LH connects only to the upper edge, but interrupts to the lower one.
HL effects the contrary to LH, connects to the lower edge, but interrupts to
the upper one.
HH connects to the upper and lower end of the edge. If connexions to
neighboured edges are interrupted, then a result will be not influenced and not
inverted.
Now I demonstrate decoding of locode and how it rules argument, result and
connecting to the edge. For this purpose I will use the following abbreviations
to mark entries and exits:
A=argument entry, R=result exit, Kyz=edge with y=a=above, y=b=below,
z=e=entry, z=x=exit, l1,l2 =locode places.
A logical cell is demonstrated, where Kax is connected to Kbe of the cell
above, and where Kbx is connected to Kae of the cell below.
The neighboured cells are analogously connected to Kae and Kbe of the shown
cell.
Kae-----------------------o------------------>>O
o->O->O |
o------>O | |
o-X----->>O | |
| o----------X------------>>O
| | | |
o-X----------X->>O----->O->-X------Kax
| o----------X-->O o->O |
| | o->>O | |
A------o---->O-->O-X-X-------->>O-------X------X------R
XOR1: | o-->O | | | o->>O | |
| | | | o----------X-->O | o->O
o-X->>O-->O | | o-------X->>O---X-------->O->-Kbx
XOR2: o->>O | | | | |
| | o--X-------X----->>O
| | | | o-----X----->>O
Kbe------X---------X-X--X-o->O->O
o---------X-o--X--->O
l1-o---->O | o-->>O
l2-Xo--->O | |
|o--------------o |
o--------------------o
If there are at XOR1 two instead of one and at XOR2 one instead of two
inverters are connected to the first edge, then locode LL does not effect
inverting, while every other code wil do. So this edge has odd entries. This
variant will complicate inverting at single lines. So the shown variant is
optimized in this respect.
Of course there are also other variants in this context too, in peculiar some,
which use locode in more than 2 places. I will not discuss here such variants
to keep the consideration simple. Out of doubt the here selected starting point
will admit every connexion made by locode - maybe not ideal in every case.
In every case many locodes will have to be stacked to build nothing but most
sinmple logical machines. Then much more inverters are to invest for storage,
than were needed to build a relation without locode.
Let us make a notion for that thing, which makes a relation out of locode:
NOTION: 'logical cell'
A logical cell is a relation, which uses locode in at least two places to
invert or not an argument and to connect it via an edge to neighboured places
or not. The count of places for results is equal to the count of places for
arguments.
NOTION: 'efficacy-giver'
A count at pleasure of logical cells laying parallel and reading at a time
Arguments as well as locode, are an efficacy-giver.
EXPLANATION:
Efficacy-giving is constructed here in that manner, that a column as in
pictures above is connected logical in one time. Of course you can connect more
of these relations in series, but you will not win an advantage in respect to
speed doing this. Also an efficacy-giver includes making carries in the width
of arguments, which needs approximately the same time as during adding.
So series of efficacy-givers do not admit to shorten the need of time, but
make the need of more lines - important in real machines.
You can see at once, that also in those lines an argument has to be given,
which shall be held free till they are defined during efficacy. These lines
need to be set =H in every case, if they shall be held free. If a line is free
again after transitory use, then there is to set the argument =H again. The
change depending on XOR1 and XOR2, which causes odd edges and not inverted
transition using LL, has the consequence too, that the setting of free lines
has to be =L.
There is a special problem to make a transitorily used line free again. You
obviously can use only a constant for this purpose, which is as a place part of
an efficacy-giver. Then locode can be used to define an edge, which is used
only for the purpose, to transfer this constant to places, which shall be set
free. I show a picture to make this clear:
Constant L using constant locode =HH---------------------->>O
Line to define using locode =HH----------------------->>O-->O--H
Places not to define using locode =LL------------------>O-->O
Those places, where the constant is not to connect, will be inverted using
locode =LL and thus need to be inverted again in a next column. The most simple
manner is, to give the constant inverted as shown and to invert at every place
using locode =LL in a next step.
Of course there can be the other constant L available too in a further place.
If more than one argument, i.e. two operands to add, is to write parallel to
the entries of an efficacy-giver, then many edges can be defined only in the
depths of the relation, given by locode, if places of the same significance are
to connect.
You can solve on principle the problem of free lines as well as the problem of
connecting places with same significance, if the places are linked together as
shown already for operators.
You can use i.e. three arguments a,b,c and position the places neighboured
using the sheme a1,b1,c1,a2,b2,c2,a3.......
Then the argument c can define free lines. This sheme does not provoke any
changes in efficacy-giving. Operands can be linked at pleasure.
As values at such lines need to be untouched by values at neighboured places,
the edges in these places need to be interrupted. If this is not possible,
because the line has to be bridged by an edge, then the line has to be inverted
using the introduced locode =LL and has to be inverted of course again in a
next column. Thus the connexion shown at the left hand side has to be made in
every case like that one at the right hand side:
o---- --->>O----
----X---- ---->X->X-
----o --->>O----
Every not to interfere line has to be made as a sequence of edges: locode HH.
At the neighboured places, the connexion with this edge has to be interrupted.
Thus I demonstrated, that the pictures, which I use here, cannot be made up as
locode without changes. These efforts are obviously not caused by any desired
efficacy, but are not to avoid, if you want to spare places in locode.
For the sake of distinguishing the here used expression of logical relations
from the expression using locode, I will use for pictures of relations, which
are transformed to locode, in further context the...
NOTION: 'lopattern'
A sequence of locodes, ordered in two dimensions, is a lopattern. The one
of the dimensions has to be given using a length, while the other one is given
by the width of the efficacy-giver.
EXPLANATION:
Of course you can define lopatterns with less width, if you want combine them
parallel. Nevertheless you will then need the same length of combined
lopatterns in every case.
There are obviously two possibilities to relate these dimensions to the here
shown pictures of logical connexions. You can easily see, that in the most
cases the here in columns shown width should be the width of the efficacy-giver
too, while in the depth the triggers of transfers were to count. I will proceed
from this case in further consideration.
Then lopatterns are easily to combine in the depth.
But a greater width at pleasure can be made available too, if analogously to
places for constants registers are connectable, which store values at the edges
sequentially and write them back to the edges during a next run with a further,
above or below neighboured efficacy.
If you compare the relations, defined by lopatterns, with pictures of phase
machines, you can realize, that back-lines can obviously not be defined using
lopatterns. So back-lines are to establish in an other manner.
The values at back-lines are in every case parts of results. So they need to be
stored after an efficacy and pasted into the argument during a recursion.
You can easily see, that very complicated situations appear, if many back-lines
are connected to different columns. Of course you will have to realize possible
oscillations in every case in that manner, that settings before and after a
recursion are compared. At least two recursions for each back-line will have to
be done.
Although lopatterns are logical machines, they are, using this form, not to
shorten or transform using the already described rules, because there are free
lines and needed settings during the efficacy forcing logical connexions, which
of course must not be shortened or transformed.
After discussing all details depending on locode and how an efficacy is made
by it, now there is to consider, how lopatterns can influence iteration
machines, and how these ones can reversely influence lopatterns or arguments.
This is indeed very easily done, if logical patterns give a relative adress in
a part of the width, which adresses in a stack of adresses. There adresses
of labels can be stored as well as base-adresses of locode or arguments.
Also transforming of any places in iteration machines to something, which
influences logical patterns or arguments, is easily done, if a part of the
width in arguments is not set using stored values, but is set by states in the
iteration machine. This can be a criterion or a message, that i.e. the keyboard
send a value, which then can be made up as an argument using a procedure.
But if a greater set of data has to get the same significance as i.e. a picture
out of a camera, then these values will have to be stored first, before they
are to manage using a peculiar lopattern. An actual lopattern, which is not fit
for that purpose, then has to branch.
Now I can introduce the prototype of a sequence for managing the efficacy-giver
including all those places too, which I demonstrated above as needed ones.
I will not use opcode to demonstrate this sequence, because it needs not
strictly used in an iteration machine. Because of this I will also omit
optimizations and will concentrate on the most important.
But I will use labels with the postfix ":", comments inside brackets "()" and
will indent the quasi-commands.
(Variables will follow.....)
Basis1: adress of lopattern
LopatternAdress: actual adress
Loopcount: actual length
Basis2: first argument
.................possible further base-adresses und variables
Initialization:
Read under the adress under "Basis1" the length of lopattern and write
it after decrementing to "Loopcount".
(the value will be decremnented by the loop-counter)
Read under adress of "Basis1" the baseadress and write it to
"LopatternAdress:"
Read under adress of "Basis1" the argument and write it to the
efficacy-giver.
.................possible further initializations.
Loop:
Increment adress of lopattern under "LopatternAdress", use result to
adress locode and write it to the efficacy-giver.
.................possible further settings.
(Now in the efficacy-giver one column is effected using locode)
Loopcounter:
Decrement "Loopcount"
If =0 ,then jump to "EndResult:"
Else write the result of the efficacy-giver as next argument to it.
.................possible other use of places in the result.
Jump to "Loop:"
EndResult:
Use of values in result and conditioned by that, occassionally
branching to other sequences and returning to here.
Write new adresses and values to the above variables.
Jump to "Initialization:" (a not here terminated loop)
Even if every relation can be established using locode, some certain relations
used for operating logical and arithmetical, which are constructed simple and
regular, can be useful for extending an efficacy-giver. In peculiar shifting
can be done wether simply nor fast using locode. So operating outside of an
efficacy-giver can effect more speed and spare inverters.
Also efficacy-giving could be done using opcode, inverting and NORing. But this
does not effect more speed and causes much more program than needed to transfer
lopatterns. So this possibility is only to mention for completeness.
I introduced here such an efficacy-giving, where lopatterns can adress only in
that way, that relative adresses in stacks of adresses or other values can be
given, which indeed can be not used in adress-givers without opcode. This needs
not to be like that. Of course an efficacy-giver can also be extended by a
relation, which does not only directly adress in the storage manages by this
way the transfer of locode and date, but is additionally able to directly
adress operators and thus to write results to them or read arguments there.
This would be a variant of an iteration machine, where the control is not done
in the above descripted manner using opcode, but using places in the
efficacy-giver.
3.2. LOGICAL LIFE
While an iteration machine can gather experiance from reset to reset only in
the form of data, a logical creature may also got altered lopatterns and by
this can have changed its behaviour. So a logical creature includes an own time
as a stored experiance. It has a life, which starts at a given state and goes
on evaluating a 'mature' state by a certain realization of stimulation as
experiance. I will call here the given state at the first reset also the
'talent'. The mature state, which obvious has to be initialized by talent too,
can be called 'experiance' in every case, but can appear in very different
forms.
You can see at once, that there is a life in an outer world to distinguish from
a life in an inner world, connected by talents. These talents can be given in
such a form, that a stimulus from the outer world immediately forces changes
in the inner world and effects adapted behaviour by this way. Such talents will
enable a logical creature to reach the mature state very fast and you then can
distinguish it from an iteration machine only in such respect, that the final
state was reached by much more efforts than needed. You can easier get to that
final state by programing with common sense.
But the talents can be given else, so that stimulation has an effect for the
first in a world of ideas, which are part of the inner world. Only then a
logical creature is able to learn something, which was not part of the talents.
Now I want to consider, how talents have to be given, so that experiance does
not only force an adaption, but is used to produce new ideas and learning.
I demonstrated already the possibilities for changes as the possibility to
change relative adresses, which are used to adress stacks containing values or
adresses of labels to jump to. By this there was said too, that in every case
more lopatterns and branches in program have to be provided, than needed for a
certain task. So these are alternatives, which are not produced during a
logical life, but are given already at the first reset. Even ideas have to be
given as prototypes. The world of ideas must not be a 'tabula rasa'.
Only then a logical creature has options, which it may extend or also restrict
during its logical life.
A choice between two alternatives cannot be restricted. A choice can only be
extended, if there are at least three alternatives existing. A 'tertium datur'
must exist.
The third alternative has to be given as a kind of making a carry, admitting to
leave the world of ideas, given by talent, by producing and proving new ideas,
which are in every case to evaluate starting at already existing ones. Even if
new ideas were found by dicing, they were not to qualify without respect to
already given ones. So every experiance is to deduce starting at talents. It
is not available without a fitting talent.
For such purpose the relative adressed adresses must not be stacked at pleasure.
They need to be ordered adresses, but are not numbers in this case, because
they cannot be a complete quantity of adresses. But they will be relatively
adressed using a complete quantity of adresses, and these ones therefore can be
operated like numbers. By this way the simple idea is to find, that relative
adresses are an 'amplitude' for making significance at pleasure.
You can tune in this manner between good and bad or painful and pleasant or
soft and hard...
Now there is to demonstrate, how the world of ideas is to represent, so that it
can be as efficiant as the stimulation, transmitted by the iteration machine.
For the first, a stimulus has not only to effect a reaction in the outer
world, but has to effect a trace in the world of ideas too. This must not force
immediately a change of lopatterns, because they make the significance.
As this world of ideas consists of nothing else than values H,L, it can only be
a picture like that raster, which I introduced already under 2.2.1.2.1. Such a
raster can include as much dimensions as you like, which are to give by
counting parts of the length. Such a length can also be the here mentioned
'amplitude'.
Such amplitudes are variable on principle. So a raster can be read and written
in different manner. By this way a raster at the one hand side can be altered
due to stimulation and the manner to write to it and at the other hand side
that raster can influence reactions due to the manner to read and interpret
read values using lopatterns.
As lopatterns as well as settings can be taken as a raster too, nothing else is
needed to represent an inner world, which can contain every idea, intention
or affection. Only by this means you can desire 'artificial intelligence',
while iteration machines without an efficacy-giver may enable adapting to a
stimulation, but not an evaluation of ideas, which is needed for single minded
behaving and learning.
But lopatterns are obviously not to structure using amplitudes, and therefore
are to confront to those rasters, which are as arguments part of the settings.
I will call these special rasters...
NOTION: 'loraster'
...is a raster, which causes reactions like stimulation from the outer world.
Such a raster contains arguments and not locode.
EXPLANATION:
Values read from lorasters are to dimension due to the count of places, which
are available for their use in the iteration machine and the efficacy-giver.
Nevertheless the actually read values in the loraster can be parts of a greater
loraster of a certain significance. For that purpose, you only need to alter
the length, used for reading the loraster.
Lopatterns and lorasters are the logical representation of everything in a
logical creature, which is the variable part of the inner world. By this also
opcode becomes variable, which can be produced by lopatterns and program.
In further consideration I will replace these variables by the metaphor:'soul'.
The soul consists at the start of a logical life only of the talents and will
be extended and impressed by experiance.
After the first reset, the soul needs to be maximum alterable. But this state
must not remain, because else there could not be gathered an experiance, which
remains. Experiance needs to become important by that way, that it inhibits
to alter the soul. At the other hand side, ideas can be wrong in any respect.
Therefore the inhibitation needs to be variable by newly sensed values coming
from inner or outer world.
Obvious the soul needs to contain a talent, which enables to build and validate
ideas, before experiance becomes a remaining change of soul. This talent is the
'feeling', which rules playing with possibilities. It is the immediate
consequence of stimulation and reasons its validation and significance.
The feeling has to cause ideas and intentions, which appear as 'interest' and
are driven by a 'hope', which is part of the validation. In this context the
feeling is a kind of making carry, which different to that one in arithmetical
operators is fed back to lopatterns and lorasters.
If making experiance shall be 'learning' and not only a reflected change of
behaviour, then learning needs to be intended before it can be learning. And a
variable hope needs to exist, that a certain playing with possibilities may
aim at an effect, which can be experiance. Only by this way an interest will
result an experiance, which was learned and not only made.
By that way an initially unclear interest and unclear intention and hope become
precise ideas, which admits more precise intentions and more concrete hope to
finish ideas, so that finally a remaining change in lopatterns is reasoned.
By that way images of the outer world will be developed during a logical life,
which are not only a reproduction of stimulation, but a learned feeling, which
then guides interest different to the first feeling after the first reset.
Thus learning is a game, which can be played using different strategies, but
with an unclear aim in every case, given by interest and hope.
If any idea might be an aim, is only then to decide, if it is reached already,
thus a posteriori. Only an already as idea existing state can be tested - and
only in respect to already existing other ideas.
If an idea pleases, then interest has to wane and hope has to be diminished,
because else the ever same search for a pleasing insight would be repeated.
This will cost additional storage, which will never be enough storage. Such
rituals could appear, if certain experiance is inhibited by such a hope, so
that a logical creature is not able to admit it, because it assigns a false
significance.
So there is to see, that logical creatures become dull, not only then, when
interest wanes because of no hope, but also then, when interest cannot wane
because of any not vanishing hope.
But as every playing with possibilities causes a need for storage, going dull
is not to inhibit in any case. But this will appear then in another form as
forgetfulness, if the way out of this unpleasent situation is found in
overwriting already used storage, or it appears as ignorance, if every interest
is inhibited.
Because of this a further sequence will be needed, where ideas are compressed,
so that to forget and to ignore can be guided by the feeling. So a feeling must
be to sharpen for the essence. At the beginning of a logical life, as few as
possible should be forgotten. Then also more storage is available, which has
obviously to be felt as well and thus can be a measure for interest and hope.
By this way going dull can be displaced in time so far, that a long logical
life will be possible. Even if the sense of a logical life were only the task
to find formulas, while a success may not appear as going dull, then you will
anyway have to sense, if there is storage enough for the next formula, or if
the old age is reached.
Finally the playing with possibilities is limited by the fact, that not at all
every experiance exists at one time.
In an iteration machine there are only a few places in the status register and
a adress in the opcode or the program counter, which really are the whole
relevant memory at a time. Also if you use an efficacy-giver in this machine,
you cannot get at pleasure further criterions existing at one time. But indeed
lorasters can make much more criterions accessable. So a logical life is done
by permanently iterating inside the soul aiming to make ideas out of experiance
and knowledge out of ideas. If there is additionally an outer world of interest
being a source of too much stimulation, then obviously either the soul or the
outer world can be managed by reactions. Then you can prevent of going dull
only by a talent, which selects a stimulus from the outer world fast and
ignores it if possible. Else the handling of ideas has to be avoided.
Now we can see, that living a logical life is limited on principle to all
intents and purposes. The processes at a time as well as the total count of
processes can not be related to as many places as you like. So talents are
limited as well as the possibilities for scaling reactions using relative
adresses.
Playing with ideas does not only need time, but needs states for reacting at
the one hand side and thinking at the other hand side, which can be
distinguished. These states are only then possible ones, if a logical creature
can sense itself as an individual being with an own soul and will, which are
opposite to everything in the outer world. This is 'consciousness', which
nevertheless needs to include everything, which in fact reasons soul and will.
Indeed there has to exist an 'under-consciousness' too, because in the else
case things have to be respected, which are part of the talent and cannot be
touched without severe consequences. The more thinking goes on to the source of
every significance, the more fatal will be the consequence of changes in the
inner world.